Lines Matching refs:vmw_fifo_mem_read
60 fifo_min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN); in vmw_supports_3d()
64 hwversion = vmw_fifo_mem_read(dev_priv, in vmw_supports_3d()
90 caps = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_CAPABILITIES); in vmw_fifo_have_pitchlock()
140 max = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MAX); in vmw_fifo_create()
141 min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN); in vmw_fifo_create()
142 fifo->capabilities = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_CAPABILITIES); in vmw_fifo_create()
189 uint32_t max = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MAX); in vmw_fifo_is_full()
190 uint32_t next_cmd = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_NEXT_CMD); in vmw_fifo_is_full()
191 uint32_t min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN); in vmw_fifo_is_full()
192 uint32_t stop = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_STOP); in vmw_fifo_is_full()
289 max = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MAX); in vmw_local_fifo_reserve()
290 min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN); in vmw_local_fifo_reserve()
291 next_cmd = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_NEXT_CMD); in vmw_local_fifo_reserve()
302 uint32_t stop = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_STOP); in vmw_local_fifo_reserve()
430 uint32_t next_cmd = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_NEXT_CMD); in vmw_local_fifo_commit()
431 uint32_t max = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MAX); in vmw_local_fifo_commit()
432 uint32_t min = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_MIN); in vmw_local_fifo_commit()