Lines Matching refs:tile
48 drm_WARN(&mmio->tile->xe->drm, 1, in assert_iir_is_zero()
61 static void unmask_and_enable(struct xe_tile *tile, u32 irqregs, u32 bits) in unmask_and_enable() argument
63 struct xe_mmio *mmio = &tile->mmio; in unmask_and_enable()
79 static void mask_and_disable(struct xe_tile *tile, u32 irqregs) in mask_and_disable() argument
81 struct xe_mmio *mmio = &tile->mmio; in mask_and_disable()
279 static struct xe_gt *pick_engine_gt(struct xe_tile *tile, in pick_engine_gt() argument
283 struct xe_device *xe = tile_to_xe(tile); in pick_engine_gt()
286 return tile->primary_gt; in pick_engine_gt()
291 return tile->media_gt; in pick_engine_gt()
297 return tile->media_gt; in pick_engine_gt()
303 return tile->primary_gt; in pick_engine_gt()
307 static void gt_irq_handler(struct xe_tile *tile, in gt_irq_handler() argument
311 struct xe_device *xe = tile_to_xe(tile); in gt_irq_handler()
312 struct xe_mmio *mmio = &tile->mmio; in gt_irq_handler()
336 engine_gt = pick_engine_gt(tile, class, instance); in gt_irq_handler()
370 struct xe_tile *tile = xe_device_get_root_tile(xe); in xelp_irq_handler() local
384 gt_irq_handler(tile, master_ctl, intr_dw, identity); in xelp_irq_handler()
432 struct xe_tile *tile; in dg1_irq_handler() local
449 for_each_tile(tile, xe, id) { in dg1_irq_handler()
450 struct xe_mmio *mmio = &tile->mmio; in dg1_irq_handler()
452 if ((master_tile_ctl & DG1_MSTR_TILE(tile->id)) == 0) in dg1_irq_handler()
463 drm_dbg(&tile_to_xe(tile)->drm, in dg1_irq_handler()
470 gt_irq_handler(tile, master_ctl, intr_dw, identity); in dg1_irq_handler()
492 static void gt_irq_reset(struct xe_tile *tile) in gt_irq_reset() argument
494 struct xe_mmio *mmio = &tile->mmio; in gt_irq_reset()
496 u32 ccs_mask = xe_hw_engine_mask_per_class(tile->primary_gt, in gt_irq_reset()
498 u32 bcs_mask = xe_hw_engine_mask_per_class(tile->primary_gt, in gt_irq_reset()
526 if ((tile->media_gt && in gt_irq_reset()
527 xe_hw_engine_mask_per_class(tile->media_gt, XE_ENGINE_CLASS_OTHER)) || in gt_irq_reset()
528 tile_to_xe(tile)->info.has_heci_gscfi) { in gt_irq_reset()
542 static void xelp_irq_reset(struct xe_tile *tile) in xelp_irq_reset() argument
544 xelp_intr_disable(tile_to_xe(tile)); in xelp_irq_reset()
546 gt_irq_reset(tile); in xelp_irq_reset()
548 if (IS_SRIOV_VF(tile_to_xe(tile))) in xelp_irq_reset()
551 mask_and_disable(tile, PCU_IRQ_OFFSET); in xelp_irq_reset()
554 static void dg1_irq_reset(struct xe_tile *tile) in dg1_irq_reset() argument
556 if (xe_tile_is_root(tile)) in dg1_irq_reset()
557 dg1_intr_disable(tile_to_xe(tile)); in dg1_irq_reset()
559 gt_irq_reset(tile); in dg1_irq_reset()
561 if (IS_SRIOV_VF(tile_to_xe(tile))) in dg1_irq_reset()
564 mask_and_disable(tile, PCU_IRQ_OFFSET); in dg1_irq_reset()
567 static void dg1_irq_reset_mstr(struct xe_tile *tile) in dg1_irq_reset_mstr() argument
569 struct xe_mmio *mmio = &tile->mmio; in dg1_irq_reset_mstr()
576 struct xe_tile *tile; in vf_irq_reset() local
586 for_each_tile(tile, xe, id) { in vf_irq_reset()
588 xe_memirq_reset(&tile->memirq); in vf_irq_reset()
590 gt_irq_reset(tile); in vf_irq_reset()
596 struct xe_tile *tile; in xe_irq_reset() local
603 for_each_tile(tile, xe, id) in xe_irq_reset()
604 xe_memirq_reset(&tile->memirq); in xe_irq_reset()
607 for_each_tile(tile, xe, id) { in xe_irq_reset()
609 dg1_irq_reset(tile); in xe_irq_reset()
611 xelp_irq_reset(tile); in xe_irq_reset()
614 tile = xe_device_get_root_tile(xe); in xe_irq_reset()
615 mask_and_disable(tile, GU_MISC_IRQ_OFFSET); in xe_irq_reset()
624 for_each_tile(tile, xe, id) in xe_irq_reset()
625 dg1_irq_reset_mstr(tile); in xe_irq_reset()
631 struct xe_tile *tile; in vf_irq_postinstall() local
634 for_each_tile(tile, xe, id) in vf_irq_postinstall()
636 xe_memirq_postinstall(&tile->memirq); in vf_irq_postinstall()
650 struct xe_tile *tile; in xe_irq_postinstall() local
653 for_each_tile(tile, xe, id) in xe_irq_postinstall()
654 xe_memirq_postinstall(&tile->memirq); in xe_irq_postinstall()
676 struct xe_tile *tile; in vf_mem_irq_handler() local
682 for_each_tile(tile, xe, id) in vf_mem_irq_handler()
683 xe_memirq_handler(&tile->memirq); in vf_mem_irq_handler()
849 struct xe_tile *tile; in guc2host_irq_handler() local
855 for_each_tile(tile, xe, id) in guc2host_irq_handler()
856 xe_guc_irq_handler(&tile->primary_gt->uc.guc, in guc2host_irq_handler()
869 struct xe_tile *tile; in xe_irq_msix_default_hwe_handler() local
875 for_each_tile(tile, xe, tile_id) { in xe_irq_msix_default_hwe_handler()
876 memirq = &tile->memirq; in xe_irq_msix_default_hwe_handler()
881 if (gt->tile != tile) in xe_irq_msix_default_hwe_handler()