Lines Matching refs:i2c_dev
309 static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, in dvc_writel() argument
312 writel_relaxed(val, i2c_dev->base + reg); in dvc_writel()
315 static u32 dvc_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in dvc_readl() argument
317 return readl_relaxed(i2c_dev->base + reg); in dvc_readl()
324 static u32 tegra_i2c_reg_addr(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in tegra_i2c_reg_addr() argument
326 if (IS_DVC(i2c_dev)) in tegra_i2c_reg_addr()
328 else if (IS_VI(i2c_dev)) in tegra_i2c_reg_addr()
334 static void i2c_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned int reg) in i2c_writel() argument
336 writel_relaxed(val, i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
340 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_writel()
341 else if (IS_VI(i2c_dev)) in i2c_writel()
342 readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, I2C_INT_STATUS)); in i2c_writel()
345 static u32 i2c_readl(struct tegra_i2c_dev *i2c_dev, unsigned int reg) in i2c_readl() argument
347 return readl_relaxed(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg)); in i2c_readl()
350 static void i2c_writesl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl() argument
353 writesl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_writesl()
356 static void i2c_writesl_vi(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_writesl_vi() argument
368 i2c_writel(i2c_dev, *data32++, reg); in i2c_writesl_vi()
371 static void i2c_readsl(struct tegra_i2c_dev *i2c_dev, void *data, in i2c_readsl() argument
374 readsl(i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg), data, len); in i2c_readsl()
377 static void tegra_i2c_mask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_mask_irq() argument
381 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) & ~mask; in tegra_i2c_mask_irq()
382 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_mask_irq()
385 static void tegra_i2c_unmask_irq(struct tegra_i2c_dev *i2c_dev, u32 mask) in tegra_i2c_unmask_irq() argument
389 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) | mask; in tegra_i2c_unmask_irq()
390 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_unmask_irq()
395 struct tegra_i2c_dev *i2c_dev = args; in tegra_i2c_dma_complete() local
397 complete(&i2c_dev->dma_complete); in tegra_i2c_dma_complete()
400 static int tegra_i2c_dma_submit(struct tegra_i2c_dev *i2c_dev, size_t len) in tegra_i2c_dma_submit() argument
405 dev_dbg(i2c_dev->dev, "starting DMA for length: %zu\n", len); in tegra_i2c_dma_submit()
407 reinit_completion(&i2c_dev->dma_complete); in tegra_i2c_dma_submit()
409 dir = i2c_dev->msg_read ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; in tegra_i2c_dma_submit()
411 dma_desc = dmaengine_prep_slave_single(i2c_dev->dma_chan, i2c_dev->dma_phys, in tegra_i2c_dma_submit()
415 dev_err(i2c_dev->dev, "failed to get %s DMA descriptor\n", in tegra_i2c_dma_submit()
416 i2c_dev->msg_read ? "RX" : "TX"); in tegra_i2c_dma_submit()
421 dma_desc->callback_param = i2c_dev; in tegra_i2c_dma_submit()
424 dma_async_issue_pending(i2c_dev->dma_chan); in tegra_i2c_dma_submit()
429 static void tegra_i2c_release_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_dma() argument
431 if (i2c_dev->dma_buf) { in tegra_i2c_release_dma()
432 dma_free_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size, in tegra_i2c_release_dma()
433 i2c_dev->dma_buf, i2c_dev->dma_phys); in tegra_i2c_release_dma()
434 i2c_dev->dma_buf = NULL; in tegra_i2c_release_dma()
437 if (i2c_dev->dma_chan) { in tegra_i2c_release_dma()
438 dma_release_channel(i2c_dev->dma_chan); in tegra_i2c_release_dma()
439 i2c_dev->dma_chan = NULL; in tegra_i2c_release_dma()
443 static int tegra_i2c_init_dma(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_dma() argument
449 if (IS_VI(i2c_dev)) in tegra_i2c_init_dma()
452 if (i2c_dev->hw->has_apb_dma) { in tegra_i2c_init_dma()
454 dev_dbg(i2c_dev->dev, "APB DMA support not enabled\n"); in tegra_i2c_init_dma()
458 dev_dbg(i2c_dev->dev, "GPC DMA support not enabled\n"); in tegra_i2c_init_dma()
467 i2c_dev->dma_chan = dma_request_chan(i2c_dev->dev, "tx"); in tegra_i2c_init_dma()
468 if (IS_ERR(i2c_dev->dma_chan)) { in tegra_i2c_init_dma()
469 err = PTR_ERR(i2c_dev->dma_chan); in tegra_i2c_init_dma()
470 i2c_dev->dma_chan = NULL; in tegra_i2c_init_dma()
474 i2c_dev->dma_dev = i2c_dev->dma_chan->device->dev; in tegra_i2c_init_dma()
475 i2c_dev->dma_buf_size = i2c_dev->hw->quirks->max_write_len + in tegra_i2c_init_dma()
478 dma_buf = dma_alloc_coherent(i2c_dev->dma_dev, i2c_dev->dma_buf_size, in tegra_i2c_init_dma()
481 dev_err(i2c_dev->dev, "failed to allocate DMA buffer\n"); in tegra_i2c_init_dma()
486 i2c_dev->dma_buf = dma_buf; in tegra_i2c_init_dma()
487 i2c_dev->dma_phys = dma_phys; in tegra_i2c_init_dma()
492 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_init_dma()
494 dev_err(i2c_dev->dev, "cannot use DMA: %d\n", err); in tegra_i2c_init_dma()
495 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_init_dma()
509 static void tegra_dvc_init(struct tegra_i2c_dev *i2c_dev) in tegra_dvc_init() argument
513 val = dvc_readl(i2c_dev, DVC_CTRL_REG3); in tegra_dvc_init()
516 dvc_writel(i2c_dev, val, DVC_CTRL_REG3); in tegra_dvc_init()
518 val = dvc_readl(i2c_dev, DVC_CTRL_REG1); in tegra_dvc_init()
520 dvc_writel(i2c_dev, val, DVC_CTRL_REG1); in tegra_dvc_init()
523 static void tegra_i2c_vi_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_vi_init() argument
529 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
535 i2c_writel(i2c_dev, value, I2C_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
539 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_0); in tegra_i2c_vi_init()
544 i2c_writel(i2c_dev, value, I2C_HS_INTERFACE_TIMING_1); in tegra_i2c_vi_init()
547 i2c_writel(i2c_dev, value, I2C_BUS_CLEAR_CNFG); in tegra_i2c_vi_init()
549 i2c_writel(i2c_dev, 0x0, I2C_TLOW_SEXT); in tegra_i2c_vi_init()
552 static int tegra_i2c_poll_register(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_register() argument
556 void __iomem *addr = i2c_dev->base + tegra_i2c_reg_addr(i2c_dev, reg); in tegra_i2c_poll_register()
559 if (!i2c_dev->atomic_mode) in tegra_i2c_poll_register()
567 static int tegra_i2c_flush_fifos(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_flush_fifos() argument
572 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_flush_fifos()
582 val = i2c_readl(i2c_dev, offset); in tegra_i2c_flush_fifos()
584 i2c_writel(i2c_dev, val, offset); in tegra_i2c_flush_fifos()
586 err = tegra_i2c_poll_register(i2c_dev, offset, mask, 1000, 1000000); in tegra_i2c_flush_fifos()
588 dev_err(i2c_dev->dev, "failed to flush FIFO\n"); in tegra_i2c_flush_fifos()
595 static int tegra_i2c_wait_for_config_load(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_wait_for_config_load() argument
599 if (!i2c_dev->hw->has_config_load_reg) in tegra_i2c_wait_for_config_load()
602 i2c_writel(i2c_dev, I2C_MSTR_CONFIG_LOAD, I2C_CONFIG_LOAD); in tegra_i2c_wait_for_config_load()
604 err = tegra_i2c_poll_register(i2c_dev, I2C_CONFIG_LOAD, 0xffffffff, in tegra_i2c_wait_for_config_load()
607 dev_err(i2c_dev->dev, "failed to load config\n"); in tegra_i2c_wait_for_config_load()
614 static int tegra_i2c_master_reset(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_master_reset() argument
616 if (!i2c_dev->hw->has_mst_reset) in tegra_i2c_master_reset()
625 i2c_writel(i2c_dev, 0x1, I2C_MASTER_RESET_CNTRL); in tegra_i2c_master_reset()
628 i2c_writel(i2c_dev, 0x0, I2C_MASTER_RESET_CNTRL); in tegra_i2c_master_reset()
634 static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init() argument
637 struct i2c_timings *t = &i2c_dev->timings; in tegra_i2c_init()
646 err = device_reset(i2c_dev->dev); in tegra_i2c_init()
648 err = tegra_i2c_master_reset(i2c_dev); in tegra_i2c_init()
660 if (IS_DVC(i2c_dev)) in tegra_i2c_init()
661 tegra_dvc_init(i2c_dev); in tegra_i2c_init()
666 if (i2c_dev->hw->has_multi_master_mode) in tegra_i2c_init()
669 i2c_writel(i2c_dev, val, I2C_CNFG); in tegra_i2c_init()
670 i2c_writel(i2c_dev, 0, I2C_INT_MASK); in tegra_i2c_init()
672 if (IS_VI(i2c_dev)) in tegra_i2c_init()
673 tegra_i2c_vi_init(i2c_dev); in tegra_i2c_init()
678 tlow = i2c_dev->hw->tlow_fast_fastplus_mode; in tegra_i2c_init()
679 thigh = i2c_dev->hw->thigh_fast_fastplus_mode; in tegra_i2c_init()
680 tsu_thd = i2c_dev->hw->setup_hold_time_fast_fast_plus_mode; in tegra_i2c_init()
683 non_hs_mode = i2c_dev->hw->clk_divisor_fast_plus_mode; in tegra_i2c_init()
685 non_hs_mode = i2c_dev->hw->clk_divisor_fast_mode; in tegra_i2c_init()
689 tlow = i2c_dev->hw->tlow_std_mode; in tegra_i2c_init()
690 thigh = i2c_dev->hw->thigh_std_mode; in tegra_i2c_init()
691 tsu_thd = i2c_dev->hw->setup_hold_time_std_mode; in tegra_i2c_init()
692 non_hs_mode = i2c_dev->hw->clk_divisor_std_mode; in tegra_i2c_init()
698 i2c_dev->hw->clk_divisor_hs_mode) | in tegra_i2c_init()
700 i2c_writel(i2c_dev, clk_divisor, I2C_CLK_DIVISOR); in tegra_i2c_init()
702 if (i2c_dev->hw->has_interface_timing_reg) { in tegra_i2c_init()
705 i2c_writel(i2c_dev, val, I2C_INTERFACE_TIMING_0); in tegra_i2c_init()
712 if (i2c_dev->hw->has_interface_timing_reg && tsu_thd) in tegra_i2c_init()
713 i2c_writel(i2c_dev, tsu_thd, I2C_INTERFACE_TIMING_1); in tegra_i2c_init()
717 err = clk_set_rate(i2c_dev->div_clk, in tegra_i2c_init()
720 dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err); in tegra_i2c_init()
724 if (!IS_DVC(i2c_dev) && !IS_VI(i2c_dev)) { in tegra_i2c_init()
725 u32 sl_cfg = i2c_readl(i2c_dev, I2C_SL_CNFG); in tegra_i2c_init()
728 i2c_writel(i2c_dev, sl_cfg, I2C_SL_CNFG); in tegra_i2c_init()
729 i2c_writel(i2c_dev, 0xfc, I2C_SL_ADDR1); in tegra_i2c_init()
730 i2c_writel(i2c_dev, 0x00, I2C_SL_ADDR2); in tegra_i2c_init()
733 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_init()
737 if (i2c_dev->multimaster_mode && i2c_dev->hw->has_slcg_override_reg) in tegra_i2c_init()
738 i2c_writel(i2c_dev, I2C_MST_CORE_CLKEN_OVR, I2C_CLKEN_OVERRIDE); in tegra_i2c_init()
740 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_init()
747 static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_disable_packet_mode() argument
757 udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->timings.bus_freq_hz)); in tegra_i2c_disable_packet_mode()
759 cnfg = i2c_readl(i2c_dev, I2C_CNFG); in tegra_i2c_disable_packet_mode()
761 i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG); in tegra_i2c_disable_packet_mode()
763 return tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_disable_packet_mode()
766 static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_empty_rx_fifo() argument
768 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_empty_rx_fifo()
770 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_empty_rx_fifo()
777 if (WARN_ON_ONCE(!(i2c_dev->msg_buf_remaining))) in tegra_i2c_empty_rx_fifo()
780 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_empty_rx_fifo()
781 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
784 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_empty_rx_fifo()
793 i2c_readsl(i2c_dev, buf, I2C_RX_FIFO, words_to_transfer); in tegra_i2c_empty_rx_fifo()
809 val = i2c_readl(i2c_dev, I2C_RX_FIFO); in tegra_i2c_empty_rx_fifo()
820 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_empty_rx_fifo()
821 i2c_dev->msg_buf = buf; in tegra_i2c_empty_rx_fifo()
826 static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_fill_tx_fifo() argument
828 size_t buf_remaining = i2c_dev->msg_buf_remaining; in tegra_i2c_fill_tx_fifo()
830 u8 *buf = i2c_dev->msg_buf; in tegra_i2c_fill_tx_fifo()
833 if (i2c_dev->hw->has_mst_fifo) { in tegra_i2c_fill_tx_fifo()
834 val = i2c_readl(i2c_dev, I2C_MST_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
837 val = i2c_readl(i2c_dev, I2C_FIFO_STATUS); in tegra_i2c_fill_tx_fifo()
864 i2c_dev->msg_buf_remaining = buf_remaining; in tegra_i2c_fill_tx_fifo()
865 i2c_dev->msg_buf = buf + words_to_transfer * BYTES_PER_FIFO_WORD; in tegra_i2c_fill_tx_fifo()
867 if (IS_VI(i2c_dev)) in tegra_i2c_fill_tx_fifo()
868 i2c_writesl_vi(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
870 i2c_writesl(i2c_dev, buf, I2C_TX_FIFO, words_to_transfer); in tegra_i2c_fill_tx_fifo()
889 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_fill_tx_fifo()
890 i2c_dev->msg_buf = NULL; in tegra_i2c_fill_tx_fifo()
892 i2c_writel(i2c_dev, val, I2C_TX_FIFO); in tegra_i2c_fill_tx_fifo()
901 struct tegra_i2c_dev *i2c_dev = dev_id; in tegra_i2c_isr() local
904 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_isr()
907 dev_warn(i2c_dev->dev, "IRQ status 0 %08x %08x %08x\n", in tegra_i2c_isr()
908 i2c_readl(i2c_dev, I2C_PACKET_TRANSFER_STATUS), in tegra_i2c_isr()
909 i2c_readl(i2c_dev, I2C_STATUS), in tegra_i2c_isr()
910 i2c_readl(i2c_dev, I2C_CNFG)); in tegra_i2c_isr()
911 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
916 tegra_i2c_disable_packet_mode(i2c_dev); in tegra_i2c_isr()
918 i2c_dev->msg_err |= I2C_ERR_NO_ACK; in tegra_i2c_isr()
920 i2c_dev->msg_err |= I2C_ERR_ARBITRATION_LOST; in tegra_i2c_isr()
928 if (i2c_dev->hw->supports_bus_clear && (status & I2C_INT_BUS_CLR_DONE)) in tegra_i2c_isr()
931 if (!i2c_dev->dma_mode) { in tegra_i2c_isr()
932 if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
933 if (tegra_i2c_empty_rx_fifo(i2c_dev)) { in tegra_i2c_isr()
939 i2c_dev->msg_err |= I2C_ERR_RX_BUFFER_OVERFLOW; in tegra_i2c_isr()
944 if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) { in tegra_i2c_isr()
945 if (i2c_dev->msg_buf_remaining) in tegra_i2c_isr()
946 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_isr()
948 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
953 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
954 if (IS_DVC(i2c_dev)) in tegra_i2c_isr()
955 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
966 if (i2c_dev->dma_mode) in tegra_i2c_isr()
967 i2c_dev->msg_buf_remaining = 0; in tegra_i2c_isr()
972 if (WARN_ON_ONCE(i2c_dev->msg_buf_remaining)) { in tegra_i2c_isr()
973 i2c_dev->msg_err |= I2C_ERR_UNKNOWN_INTERRUPT; in tegra_i2c_isr()
976 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
981 tegra_i2c_mask_irq(i2c_dev, in tegra_i2c_isr()
988 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_isr()
989 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_isr()
991 i2c_writel(i2c_dev, status, I2C_INT_STATUS); in tegra_i2c_isr()
993 if (IS_DVC(i2c_dev)) in tegra_i2c_isr()
994 dvc_writel(i2c_dev, DVC_STATUS_I2C_DONE_INTR, DVC_STATUS); in tegra_i2c_isr()
996 if (i2c_dev->dma_mode) { in tegra_i2c_isr()
997 dmaengine_terminate_async(i2c_dev->dma_chan); in tegra_i2c_isr()
998 complete(&i2c_dev->dma_complete); in tegra_i2c_isr()
1001 complete(&i2c_dev->msg_complete); in tegra_i2c_isr()
1006 static void tegra_i2c_config_fifo_trig(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_config_fifo_trig() argument
1013 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1018 if (i2c_dev->dma_mode) { in tegra_i2c_config_fifo_trig()
1026 if (i2c_dev->msg_read) { in tegra_i2c_config_fifo_trig()
1027 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_RX_FIFO); in tegra_i2c_config_fifo_trig()
1029 slv_config.src_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1033 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1038 reg_offset = tegra_i2c_reg_addr(i2c_dev, I2C_TX_FIFO); in tegra_i2c_config_fifo_trig()
1040 slv_config.dst_addr = i2c_dev->base_phys + reg_offset; in tegra_i2c_config_fifo_trig()
1044 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1051 err = dmaengine_slave_config(i2c_dev->dma_chan, &slv_config); in tegra_i2c_config_fifo_trig()
1053 dev_err(i2c_dev->dev, "DMA config failed: %d\n", err); in tegra_i2c_config_fifo_trig()
1054 dev_err(i2c_dev->dev, "falling back to PIO\n"); in tegra_i2c_config_fifo_trig()
1056 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_config_fifo_trig()
1057 i2c_dev->dma_mode = false; in tegra_i2c_config_fifo_trig()
1063 if (i2c_dev->hw->has_mst_fifo) in tegra_i2c_config_fifo_trig()
1070 i2c_writel(i2c_dev, val, reg); in tegra_i2c_config_fifo_trig()
1073 static unsigned long tegra_i2c_poll_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_poll_completion() argument
1081 u32 status = i2c_readl(i2c_dev, I2C_INT_STATUS); in tegra_i2c_poll_completion()
1084 tegra_i2c_isr(i2c_dev->irq, i2c_dev); in tegra_i2c_poll_completion()
1099 static unsigned long tegra_i2c_wait_completion(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_wait_completion() argument
1105 if (i2c_dev->atomic_mode) { in tegra_i2c_wait_completion()
1106 ret = tegra_i2c_poll_completion(i2c_dev, complete, timeout_ms); in tegra_i2c_wait_completion()
1108 enable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1111 disable_irq(i2c_dev->irq); in tegra_i2c_wait_completion()
1124 ret = tegra_i2c_poll_completion(i2c_dev, complete, 0); in tegra_i2c_wait_completion()
1132 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_issue_bus_clear() local
1136 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_issue_bus_clear()
1140 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1142 err = tegra_i2c_wait_for_config_load(i2c_dev); in tegra_i2c_issue_bus_clear()
1147 i2c_writel(i2c_dev, val, I2C_BUS_CLEAR_CNFG); in tegra_i2c_issue_bus_clear()
1148 tegra_i2c_unmask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1150 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, 50); in tegra_i2c_issue_bus_clear()
1151 tegra_i2c_mask_irq(i2c_dev, I2C_INT_BUS_CLR_DONE); in tegra_i2c_issue_bus_clear()
1154 dev_err(i2c_dev->dev, "failed to clear bus\n"); in tegra_i2c_issue_bus_clear()
1158 val = i2c_readl(i2c_dev, I2C_BUS_CLEAR_STATUS); in tegra_i2c_issue_bus_clear()
1160 dev_err(i2c_dev->dev, "un-recovered arbitration lost\n"); in tegra_i2c_issue_bus_clear()
1167 static void tegra_i2c_push_packet_header(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_push_packet_header() argument
1171 u32 *dma_buf = i2c_dev->dma_buf; in tegra_i2c_push_packet_header()
1177 FIELD_PREP(PACKET_HEADER0_CONT_ID, i2c_dev->cont_id) | in tegra_i2c_push_packet_header()
1180 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1183 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1185 packet_header = i2c_dev->msg_len - 1; in tegra_i2c_push_packet_header()
1187 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1190 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1212 if (i2c_dev->dma_mode && !i2c_dev->msg_read) in tegra_i2c_push_packet_header()
1215 i2c_writel(i2c_dev, packet_header, I2C_TX_FIFO); in tegra_i2c_push_packet_header()
1218 static int tegra_i2c_error_recover(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_error_recover() argument
1221 if (i2c_dev->msg_err == I2C_ERR_NONE) in tegra_i2c_error_recover()
1224 tegra_i2c_init(i2c_dev); in tegra_i2c_error_recover()
1227 if (i2c_dev->msg_err == I2C_ERR_ARBITRATION_LOST) { in tegra_i2c_error_recover()
1228 if (!i2c_dev->multimaster_mode) in tegra_i2c_error_recover()
1229 return i2c_recover_bus(&i2c_dev->adapter); in tegra_i2c_error_recover()
1234 if (i2c_dev->msg_err == I2C_ERR_NO_ACK) { in tegra_i2c_error_recover()
1244 static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, in tegra_i2c_xfer_msg() argument
1253 err = tegra_i2c_flush_fifos(i2c_dev); in tegra_i2c_xfer_msg()
1257 i2c_dev->msg_buf = msg->buf; in tegra_i2c_xfer_msg()
1258 i2c_dev->msg_len = msg->len; in tegra_i2c_xfer_msg()
1260 i2c_dev->msg_err = I2C_ERR_NONE; in tegra_i2c_xfer_msg()
1261 i2c_dev->msg_read = !!(msg->flags & I2C_M_RD); in tegra_i2c_xfer_msg()
1262 reinit_completion(&i2c_dev->msg_complete); in tegra_i2c_xfer_msg()
1271 i2c_dev->msg_len = 1; in tegra_i2c_xfer_msg()
1273 i2c_dev->msg_buf += 1; in tegra_i2c_xfer_msg()
1274 i2c_dev->msg_len -= 1; in tegra_i2c_xfer_msg()
1278 i2c_dev->msg_buf_remaining = i2c_dev->msg_len; in tegra_i2c_xfer_msg()
1280 if (i2c_dev->msg_read) in tegra_i2c_xfer_msg()
1281 xfer_size = i2c_dev->msg_len; in tegra_i2c_xfer_msg()
1283 xfer_size = i2c_dev->msg_len + I2C_PACKET_HEADER_SIZE; in tegra_i2c_xfer_msg()
1287 i2c_dev->dma_mode = xfer_size > I2C_PIO_MODE_PREFERRED_LEN && in tegra_i2c_xfer_msg()
1288 i2c_dev->dma_buf && !i2c_dev->atomic_mode; in tegra_i2c_xfer_msg()
1290 tegra_i2c_config_fifo_trig(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1297 i2c_dev->timings.bus_freq_hz); in tegra_i2c_xfer_msg()
1300 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1302 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1303 if (i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1304 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1310 tegra_i2c_push_packet_header(i2c_dev, msg, end_state); in tegra_i2c_xfer_msg()
1312 if (!i2c_dev->msg_read) { in tegra_i2c_xfer_msg()
1313 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1314 memcpy(i2c_dev->dma_buf + I2C_PACKET_HEADER_SIZE, in tegra_i2c_xfer_msg()
1315 msg->buf, i2c_dev->msg_len); in tegra_i2c_xfer_msg()
1316 err = tegra_i2c_dma_submit(i2c_dev, xfer_size); in tegra_i2c_xfer_msg()
1320 tegra_i2c_fill_tx_fifo(i2c_dev); in tegra_i2c_xfer_msg()
1324 if (i2c_dev->hw->has_per_pkt_xfer_complete_irq) in tegra_i2c_xfer_msg()
1327 if (!i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1330 else if (i2c_dev->msg_buf_remaining) in tegra_i2c_xfer_msg()
1334 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1335 dev_dbg(i2c_dev->dev, "unmasked IRQ: %02x\n", in tegra_i2c_xfer_msg()
1336 i2c_readl(i2c_dev, I2C_INT_MASK)); in tegra_i2c_xfer_msg()
1338 if (i2c_dev->dma_mode) { in tegra_i2c_xfer_msg()
1339 time_left = tegra_i2c_wait_completion(i2c_dev, in tegra_i2c_xfer_msg()
1340 &i2c_dev->dma_complete, in tegra_i2c_xfer_msg()
1348 dmaengine_synchronize(i2c_dev->dma_chan); in tegra_i2c_xfer_msg()
1349 dmaengine_terminate_sync(i2c_dev->dma_chan); in tegra_i2c_xfer_msg()
1351 if (!time_left && !completion_done(&i2c_dev->dma_complete)) { in tegra_i2c_xfer_msg()
1352 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1356 if (i2c_dev->msg_read && i2c_dev->msg_err == I2C_ERR_NONE) in tegra_i2c_xfer_msg()
1357 memcpy(i2c_dev->msg_buf, i2c_dev->dma_buf, i2c_dev->msg_len); in tegra_i2c_xfer_msg()
1360 time_left = tegra_i2c_wait_completion(i2c_dev, &i2c_dev->msg_complete, in tegra_i2c_xfer_msg()
1363 tegra_i2c_mask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1366 tegra_i2c_init(i2c_dev); in tegra_i2c_xfer_msg()
1370 dev_dbg(i2c_dev->dev, "transfer complete: %lu %d %d\n", in tegra_i2c_xfer_msg()
1371 time_left, completion_done(&i2c_dev->msg_complete), in tegra_i2c_xfer_msg()
1372 i2c_dev->msg_err); in tegra_i2c_xfer_msg()
1374 i2c_dev->dma_mode = false; in tegra_i2c_xfer_msg()
1376 err = tegra_i2c_error_recover(i2c_dev, msg); in tegra_i2c_xfer_msg()
1386 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer() local
1389 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_xfer()
1391 dev_err(i2c_dev->dev, "runtime resume failed %d\n", ret); in tegra_i2c_xfer()
1392 pm_runtime_put_noidle(i2c_dev->dev); in tegra_i2c_xfer()
1408 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], MSG_END_CONTINUE); in tegra_i2c_xfer()
1418 dev_dbg(i2c_dev->dev, "reading %d bytes\n", msgs[i].len); in tegra_i2c_xfer()
1420 ret = tegra_i2c_xfer_msg(i2c_dev, &msgs[i], end_type); in tegra_i2c_xfer()
1425 pm_runtime_put(i2c_dev->dev); in tegra_i2c_xfer()
1433 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_xfer_atomic() local
1436 i2c_dev->atomic_mode = true; in tegra_i2c_xfer_atomic()
1438 i2c_dev->atomic_mode = false; in tegra_i2c_xfer_atomic()
1445 struct tegra_i2c_dev *i2c_dev = i2c_get_adapdata(adap); in tegra_i2c_func() local
1449 if (i2c_dev->hw->has_continue_xfer_support) in tegra_i2c_func()
1670 static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_parse_dt() argument
1672 struct device_node *np = i2c_dev->dev->of_node; in tegra_i2c_parse_dt()
1675 i2c_parse_fw_timings(i2c_dev->dev, &i2c_dev->timings, true); in tegra_i2c_parse_dt()
1677 multi_mode = device_property_read_bool(i2c_dev->dev, "multi-master"); in tegra_i2c_parse_dt()
1678 i2c_dev->multimaster_mode = multi_mode; in tegra_i2c_parse_dt()
1682 i2c_dev->is_dvc = true; in tegra_i2c_parse_dt()
1686 i2c_dev->is_vi = true; in tegra_i2c_parse_dt()
1689 static int tegra_i2c_init_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_clocks() argument
1693 if (ACPI_HANDLE(i2c_dev->dev)) in tegra_i2c_init_clocks()
1696 i2c_dev->clocks[i2c_dev->nclocks++].id = "div-clk"; in tegra_i2c_init_clocks()
1698 if (i2c_dev->hw == &tegra20_i2c_hw || i2c_dev->hw == &tegra30_i2c_hw) in tegra_i2c_init_clocks()
1699 i2c_dev->clocks[i2c_dev->nclocks++].id = "fast-clk"; in tegra_i2c_init_clocks()
1701 if (IS_VI(i2c_dev)) in tegra_i2c_init_clocks()
1702 i2c_dev->clocks[i2c_dev->nclocks++].id = "slow"; in tegra_i2c_init_clocks()
1704 err = devm_clk_bulk_get(i2c_dev->dev, i2c_dev->nclocks, in tegra_i2c_init_clocks()
1705 i2c_dev->clocks); in tegra_i2c_init_clocks()
1709 err = clk_bulk_prepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1713 i2c_dev->div_clk = i2c_dev->clocks[0].clk; in tegra_i2c_init_clocks()
1715 if (!i2c_dev->multimaster_mode) in tegra_i2c_init_clocks()
1718 err = clk_enable(i2c_dev->div_clk); in tegra_i2c_init_clocks()
1720 dev_err(i2c_dev->dev, "failed to enable div-clk: %d\n", err); in tegra_i2c_init_clocks()
1727 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_init_clocks()
1732 static void tegra_i2c_release_clocks(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_release_clocks() argument
1734 if (i2c_dev->multimaster_mode) in tegra_i2c_release_clocks()
1735 clk_disable(i2c_dev->div_clk); in tegra_i2c_release_clocks()
1737 clk_bulk_unprepare(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_release_clocks()
1740 static int tegra_i2c_init_hardware(struct tegra_i2c_dev *i2c_dev) in tegra_i2c_init_hardware() argument
1744 ret = pm_runtime_get_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1746 dev_err(i2c_dev->dev, "runtime resume failed: %d\n", ret); in tegra_i2c_init_hardware()
1748 ret = tegra_i2c_init(i2c_dev); in tegra_i2c_init_hardware()
1750 pm_runtime_put_sync(i2c_dev->dev); in tegra_i2c_init_hardware()
1757 struct tegra_i2c_dev *i2c_dev; in tegra_i2c_probe() local
1761 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in tegra_i2c_probe()
1762 if (!i2c_dev) in tegra_i2c_probe()
1765 platform_set_drvdata(pdev, i2c_dev); in tegra_i2c_probe()
1767 init_completion(&i2c_dev->msg_complete); in tegra_i2c_probe()
1768 init_completion(&i2c_dev->dma_complete); in tegra_i2c_probe()
1770 i2c_dev->hw = device_get_match_data(&pdev->dev); in tegra_i2c_probe()
1771 i2c_dev->cont_id = pdev->id; in tegra_i2c_probe()
1772 i2c_dev->dev = &pdev->dev; in tegra_i2c_probe()
1774 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in tegra_i2c_probe()
1775 if (IS_ERR(i2c_dev->base)) in tegra_i2c_probe()
1776 return PTR_ERR(i2c_dev->base); in tegra_i2c_probe()
1778 i2c_dev->base_phys = res->start; in tegra_i2c_probe()
1784 i2c_dev->irq = err; in tegra_i2c_probe()
1787 irq_set_status_flags(i2c_dev->irq, IRQ_NOAUTOEN); in tegra_i2c_probe()
1789 err = devm_request_threaded_irq(i2c_dev->dev, i2c_dev->irq, in tegra_i2c_probe()
1792 dev_name(i2c_dev->dev), i2c_dev); in tegra_i2c_probe()
1796 tegra_i2c_parse_dt(i2c_dev); in tegra_i2c_probe()
1798 err = tegra_i2c_init_clocks(i2c_dev); in tegra_i2c_probe()
1802 err = tegra_i2c_init_dma(i2c_dev); in tegra_i2c_probe()
1815 if (!IS_VI(i2c_dev) && !has_acpi_companion(i2c_dev->dev)) in tegra_i2c_probe()
1816 pm_runtime_irq_safe(i2c_dev->dev); in tegra_i2c_probe()
1818 pm_runtime_enable(i2c_dev->dev); in tegra_i2c_probe()
1820 err = tegra_i2c_init_hardware(i2c_dev); in tegra_i2c_probe()
1824 i2c_set_adapdata(&i2c_dev->adapter, i2c_dev); in tegra_i2c_probe()
1825 i2c_dev->adapter.dev.of_node = i2c_dev->dev->of_node; in tegra_i2c_probe()
1826 i2c_dev->adapter.dev.parent = i2c_dev->dev; in tegra_i2c_probe()
1827 i2c_dev->adapter.retries = 1; in tegra_i2c_probe()
1828 i2c_dev->adapter.timeout = 6 * HZ; in tegra_i2c_probe()
1829 i2c_dev->adapter.quirks = i2c_dev->hw->quirks; in tegra_i2c_probe()
1830 i2c_dev->adapter.owner = THIS_MODULE; in tegra_i2c_probe()
1831 i2c_dev->adapter.class = I2C_CLASS_DEPRECATED; in tegra_i2c_probe()
1832 i2c_dev->adapter.algo = &tegra_i2c_algo; in tegra_i2c_probe()
1833 i2c_dev->adapter.nr = pdev->id; in tegra_i2c_probe()
1834 ACPI_COMPANION_SET(&i2c_dev->adapter.dev, ACPI_COMPANION(&pdev->dev)); in tegra_i2c_probe()
1836 if (i2c_dev->hw->supports_bus_clear) in tegra_i2c_probe()
1837 i2c_dev->adapter.bus_recovery_info = &tegra_i2c_recovery_info; in tegra_i2c_probe()
1839 strscpy(i2c_dev->adapter.name, dev_name(i2c_dev->dev), in tegra_i2c_probe()
1840 sizeof(i2c_dev->adapter.name)); in tegra_i2c_probe()
1842 err = i2c_add_numbered_adapter(&i2c_dev->adapter); in tegra_i2c_probe()
1849 pm_runtime_disable(i2c_dev->dev); in tegra_i2c_probe()
1851 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_probe()
1853 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_probe()
1860 struct tegra_i2c_dev *i2c_dev = platform_get_drvdata(pdev); in tegra_i2c_remove() local
1862 i2c_del_adapter(&i2c_dev->adapter); in tegra_i2c_remove()
1863 pm_runtime_force_suspend(i2c_dev->dev); in tegra_i2c_remove()
1865 tegra_i2c_release_dma(i2c_dev); in tegra_i2c_remove()
1866 tegra_i2c_release_clocks(i2c_dev); in tegra_i2c_remove()
1871 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_resume() local
1878 err = clk_bulk_enable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1887 if (IS_VI(i2c_dev)) { in tegra_i2c_runtime_resume()
1888 err = tegra_i2c_init(i2c_dev); in tegra_i2c_runtime_resume()
1896 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_resume()
1903 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_runtime_suspend() local
1905 clk_bulk_disable(i2c_dev->nclocks, i2c_dev->clocks); in tegra_i2c_runtime_suspend()
1912 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_suspend() local
1915 i2c_mark_adapter_suspended(&i2c_dev->adapter); in tegra_i2c_suspend()
1928 struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); in tegra_i2c_resume() local
1939 err = tegra_i2c_init(i2c_dev); in tegra_i2c_resume()
1954 i2c_mark_adapter_resumed(&i2c_dev->adapter); in tegra_i2c_resume()