Lines Matching refs:st
130 #define AD9467_CAN_INVERT(st) \ argument
131 (!(st)->info->has_dco || (st)->info->has_dco_invert)
154 struct ad9467_state *st; member
186 static int ad9467_spi_read(struct ad9467_state *st, unsigned int reg) in ad9467_spi_read() argument
194 ret = spi_write_then_read(st->spi, in ad9467_spi_read()
204 static int ad9467_spi_write(struct ad9467_state *st, unsigned int reg, in ad9467_spi_write() argument
207 st->buf[0] = reg >> 8; in ad9467_spi_write()
208 st->buf[1] = reg & 0xFF; in ad9467_spi_write()
209 st->buf[2] = val; in ad9467_spi_write()
211 return spi_write(st->spi, st->buf, ARRAY_SIZE(st->buf)); in ad9467_spi_write()
217 struct ad9467_state *st = iio_priv(indio_dev); in ad9467_reg_access() local
221 guard(mutex)(&st->lock); in ad9467_reg_access()
222 ret = ad9467_spi_write(st, reg, writeval); in ad9467_reg_access()
225 return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER, in ad9467_reg_access()
229 ret = ad9467_spi_read(st, reg); in ad9467_reg_access()
271 static void __ad9467_get_scale(struct ad9467_state *st, int index, in __ad9467_get_scale() argument
274 const struct ad9467_chip_info *info = st->info; in __ad9467_get_scale()
441 static int ad9467_get_scale(struct ad9467_state *st, int *val, int *val2) in ad9467_get_scale() argument
443 const struct ad9467_chip_info *info = st->info; in ad9467_get_scale()
452 ret = ad9467_spi_read(st, AN877_ADC_REG_VREF); in ad9467_get_scale()
467 __ad9467_get_scale(st, i, val, val2); in ad9467_get_scale()
472 static int ad9467_set_scale(struct ad9467_state *st, int val, int val2) in ad9467_set_scale() argument
474 const struct ad9467_chip_info *info = st->info; in ad9467_set_scale()
485 __ad9467_get_scale(st, i, &scale_val[0], &scale_val[1]); in ad9467_set_scale()
489 guard(mutex)(&st->lock); in ad9467_set_scale()
490 ret = ad9467_spi_write(st, AN877_ADC_REG_VREF, in ad9467_set_scale()
495 return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER, in ad9467_set_scale()
502 static int ad9467_outputmode_set(struct ad9467_state *st, unsigned int mode) in ad9467_outputmode_set() argument
506 ret = ad9467_spi_write(st, AN877_ADC_REG_OUTPUT_MODE, mode); in ad9467_outputmode_set()
510 return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER, in ad9467_outputmode_set()
514 static int ad9467_testmode_set(struct ad9467_state *st, unsigned int chan, in ad9467_testmode_set() argument
519 if (st->info->num_channels > 1) { in ad9467_testmode_set()
521 ret = ad9467_spi_write(st, AN877_ADC_REG_CHAN_INDEX, BIT(chan)); in ad9467_testmode_set()
526 ret = ad9467_spi_write(st, AN877_ADC_REG_TEST_IO, test_mode); in ad9467_testmode_set()
530 if (st->info->num_channels > 1) { in ad9467_testmode_set()
532 ret = ad9467_spi_write(st, AN877_ADC_REG_CHAN_INDEX, in ad9467_testmode_set()
533 GENMASK(st->info->num_channels - 1, 0)); in ad9467_testmode_set()
538 return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER, in ad9467_testmode_set()
542 static int ad9467_backend_testmode_on(struct ad9467_state *st, in ad9467_backend_testmode_on() argument
551 ret = iio_backend_data_format_set(st->back, chan, &data); in ad9467_backend_testmode_on()
555 ret = iio_backend_test_pattern_set(st->back, chan, pattern); in ad9467_backend_testmode_on()
559 return iio_backend_chan_enable(st->back, chan); in ad9467_backend_testmode_on()
562 static int ad9467_backend_testmode_off(struct ad9467_state *st, in ad9467_backend_testmode_off() argument
571 ret = iio_backend_chan_disable(st->back, chan); in ad9467_backend_testmode_off()
575 ret = iio_backend_test_pattern_set(st->back, chan, in ad9467_backend_testmode_off()
580 return iio_backend_data_format_set(st->back, chan, &data); in ad9467_backend_testmode_off()
583 static int ad9647_calibrate_prepare(struct ad9467_state *st) in ad9647_calibrate_prepare() argument
588 ret = ad9467_outputmode_set(st, st->info->default_output_mode); in ad9647_calibrate_prepare()
592 for (c = 0; c < st->info->num_channels; c++) { in ad9647_calibrate_prepare()
593 ret = ad9467_testmode_set(st, c, AN877_ADC_TESTMODE_PN9_SEQ); in ad9647_calibrate_prepare()
597 ret = ad9467_backend_testmode_on(st, c, in ad9647_calibrate_prepare()
606 static int ad9647_calibrate_polarity_set(struct ad9467_state *st, in ad9647_calibrate_polarity_set() argument
611 if (st->info->has_dco) { in ad9647_calibrate_polarity_set()
617 return ad9467_spi_write(st, AN877_ADC_REG_OUTPUT_PHASE, in ad9647_calibrate_polarity_set()
626 return iio_backend_data_sample_trigger(st->back, trigger); in ad9647_calibrate_polarity_set()
653 static int ad9467_calibrate_apply(struct ad9467_state *st, unsigned int val) in ad9467_calibrate_apply() argument
658 if (st->info->has_dco) { in ad9467_calibrate_apply()
659 ret = ad9467_spi_write(st, AN877_ADC_REG_OUTPUT_DELAY, in ad9467_calibrate_apply()
660 val | st->info->dco_en); in ad9467_calibrate_apply()
664 return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER, in ad9467_calibrate_apply()
668 for (lane = 0; lane < st->info->num_lanes; lane++) { in ad9467_calibrate_apply()
669 ret = iio_backend_iodelay_set(st->back, lane, val); in ad9467_calibrate_apply()
677 static int ad9647_calibrate_stop(struct ad9467_state *st) in ad9647_calibrate_stop() argument
682 for (c = 0; c < st->info->num_channels; c++) { in ad9647_calibrate_stop()
683 ret = ad9467_backend_testmode_off(st, c); in ad9647_calibrate_stop()
687 ret = ad9467_testmode_set(st, c, AN877_ADC_TESTMODE_OFF); in ad9647_calibrate_stop()
692 mode = st->info->default_output_mode | AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT; in ad9647_calibrate_stop()
693 return ad9467_outputmode_set(st, mode); in ad9647_calibrate_stop()
696 static int ad9467_calibrate(struct ad9467_state *st) in ad9467_calibrate() argument
703 unsigned int test_points = st->info->test_points; in ad9467_calibrate()
704 unsigned long sample_rate = clk_get_rate(st->clk); in ad9467_calibrate()
705 struct device *dev = &st->spi->dev; in ad9467_calibrate()
710 bitmap_fill(st->calib_map, st->calib_map_size); in ad9467_calibrate()
712 ret = ad9647_calibrate_prepare(st); in ad9467_calibrate()
716 ret = ad9647_calibrate_polarity_set(st, invert); in ad9467_calibrate()
720 for (point = 0; point < st->info->test_points; point++) { in ad9467_calibrate()
721 ret = ad9467_calibrate_apply(st, point); in ad9467_calibrate()
725 for (c = 0; c < st->info->num_channels; c++) { in ad9467_calibrate()
726 ret = iio_backend_chan_status(st->back, c, &stat); in ad9467_calibrate()
741 if (c == st->info->num_channels - 1) in ad9467_calibrate()
743 st->calib_map); in ad9467_calibrate()
748 cnt = ad9467_find_optimal_point(st->calib_map, 0, test_points, in ad9467_calibrate()
755 if (AD9467_CAN_INVERT(st)) { in ad9467_calibrate()
764 inv_cnt = ad9467_find_optimal_point(st->calib_map, test_points, in ad9467_calibrate()
771 ret = ad9647_calibrate_polarity_set(st, false); in ad9467_calibrate()
783 if (st->info->has_dco) in ad9467_calibrate()
790 ret = ad9467_calibrate_apply(st, val); in ad9467_calibrate()
795 return ad9647_calibrate_stop(st); in ad9467_calibrate()
802 struct ad9467_state *st = iio_priv(indio_dev); in ad9467_read_raw() local
806 return ad9467_get_scale(st, val, val2); in ad9467_read_raw()
808 *val = clk_get_rate(st->clk); in ad9467_read_raw()
816 static int __ad9467_update_clock(struct ad9467_state *st, long r_clk) in __ad9467_update_clock() argument
820 ret = clk_set_rate(st->clk, r_clk); in __ad9467_update_clock()
824 guard(mutex)(&st->lock); in __ad9467_update_clock()
825 return ad9467_calibrate(st); in __ad9467_update_clock()
832 struct ad9467_state *st = iio_priv(indio_dev); in ad9467_write_raw() local
833 const struct ad9467_chip_info *info = st->info; in ad9467_write_raw()
840 return ad9467_set_scale(st, val, val2); in ad9467_write_raw()
842 r_clk = clk_round_rate(st->clk, val); in ad9467_write_raw()
844 dev_warn(&st->spi->dev, in ad9467_write_raw()
849 sample_rate = clk_get_rate(st->clk); in ad9467_write_raw()
860 ret = __ad9467_update_clock(st, r_clk); in ad9467_write_raw()
873 struct ad9467_state *st = iio_priv(indio_dev); in ad9467_read_avail() local
874 const struct ad9467_chip_info *info = st->info; in ad9467_read_avail()
878 *vals = (const int *)st->scales; in ad9467_read_avail()
891 struct ad9467_state *st = iio_priv(indio_dev); in ad9467_update_scan_mode() local
895 for (c = 0; c < st->info->num_channels; c++) { in ad9467_update_scan_mode()
897 ret = iio_backend_chan_enable(st->back, c); in ad9467_update_scan_mode()
899 ret = iio_backend_chan_disable(st->back, c); in ad9467_update_scan_mode()
923 static int ad9467_scale_fill(struct ad9467_state *st) in ad9467_scale_fill() argument
925 const struct ad9467_chip_info *info = st->info; in ad9467_scale_fill()
928 st->scales = devm_kmalloc_array(&st->spi->dev, info->num_scales, in ad9467_scale_fill()
929 sizeof(*st->scales), GFP_KERNEL); in ad9467_scale_fill()
930 if (!st->scales) in ad9467_scale_fill()
934 __ad9467_get_scale(st, i, &val1, &val2); in ad9467_scale_fill()
935 st->scales[i][0] = val1; in ad9467_scale_fill()
936 st->scales[i][1] = val2; in ad9467_scale_fill()
957 static int ad9467_iio_backend_get(struct ad9467_state *st) in ad9467_iio_backend_get() argument
959 struct device *dev = &st->spi->dev; in ad9467_iio_backend_get()
962 st->back = devm_iio_backend_get(dev, NULL); in ad9467_iio_backend_get()
963 if (!IS_ERR(st->back)) in ad9467_iio_backend_get()
966 if (PTR_ERR(st->back) != -ENOENT) in ad9467_iio_backend_get()
967 return PTR_ERR(st->back); in ad9467_iio_backend_get()
989 st->back = __devm_iio_backend_get_from_fwnode_lookup(dev, in ad9467_iio_backend_get()
992 return PTR_ERR_OR_ZERO(st->back); in ad9467_iio_backend_get()
1000 struct ad9467_state *st = s->private; in ad9467_test_mode_available_show() local
1003 for_each_set_bit(bit, &st->info->test_mask, st->info->test_mask_len) in ad9467_test_mode_available_show()
1015 struct ad9467_state *st = chan->st; in ad9467_chan_test_mode_read() local
1025 ret = iio_backend_debugfs_print_chan_status(st->back, chan->idx, in ad9467_chan_test_mode_read()
1046 struct ad9467_state *st = chan->st; in ad9467_chan_test_mode_write() local
1056 for_each_set_bit(mode, &st->info->test_mask, st->info->test_mask_len) { in ad9467_chan_test_mode_write()
1061 if (mode == st->info->test_mask_len) in ad9467_chan_test_mode_write()
1064 guard(mutex)(&st->lock); in ad9467_chan_test_mode_write()
1071 ret = ad9467_backend_testmode_off(st, chan->idx); in ad9467_chan_test_mode_write()
1076 ret = ad9467_testmode_set(st, chan->idx, mode); in ad9467_chan_test_mode_write()
1080 out_mode = st->info->default_output_mode | AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT; in ad9467_chan_test_mode_write()
1081 ret = ad9467_outputmode_set(st, out_mode); in ad9467_chan_test_mode_write()
1085 ret = ad9467_outputmode_set(st, st->info->default_output_mode); in ad9467_chan_test_mode_write()
1089 ret = ad9467_testmode_set(st, chan->idx, mode); in ad9467_chan_test_mode_write()
1095 ret = ad9467_backend_testmode_on(st, chan->idx, in ad9467_chan_test_mode_write()
1100 ret = ad9467_backend_testmode_on(st, chan->idx, in ad9467_chan_test_mode_write()
1124 struct ad9467_state *st = file->private_data; in ad9467_dump_calib_table() local
1130 guard(mutex)(&st->lock); in ad9467_dump_calib_table()
1134 for (bit = 0; bit < st->calib_map_size; bit++) { in ad9467_dump_calib_table()
1135 if (AD9467_CAN_INVERT(st) && bit == st->calib_map_size / 2) in ad9467_dump_calib_table()
1139 test_bit(bit, st->calib_map) ? 'x' : 'o'); in ad9467_dump_calib_table()
1157 struct ad9467_state *st = iio_priv(indio_dev); in ad9467_debugfs_init() local
1164 st->chan_test = devm_kcalloc(&st->spi->dev, st->info->num_channels, in ad9467_debugfs_init()
1165 sizeof(*st->chan_test), GFP_KERNEL); in ad9467_debugfs_init()
1166 if (!st->chan_test) in ad9467_debugfs_init()
1169 debugfs_create_file("calibration_table_dump", 0400, d, st, in ad9467_debugfs_init()
1172 for (chan = 0; chan < st->info->num_channels; chan++) { in ad9467_debugfs_init()
1175 st->chan_test[chan].idx = chan; in ad9467_debugfs_init()
1176 st->chan_test[chan].st = st; in ad9467_debugfs_init()
1177 debugfs_create_file(attr_name, 0600, d, &st->chan_test[chan], in ad9467_debugfs_init()
1181 debugfs_create_file("in_voltage_test_mode_available", 0400, d, st, in ad9467_debugfs_init()
1184 iio_backend_debugfs_add(st->back, indio_dev); in ad9467_debugfs_init()
1190 struct ad9467_state *st; in ad9467_probe() local
1194 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in ad9467_probe()
1198 st = iio_priv(indio_dev); in ad9467_probe()
1199 st->spi = spi; in ad9467_probe()
1201 st->info = spi_get_device_match_data(spi); in ad9467_probe()
1202 if (!st->info) in ad9467_probe()
1205 st->calib_map_size = st->info->test_points; in ad9467_probe()
1206 if (AD9467_CAN_INVERT(st)) in ad9467_probe()
1207 st->calib_map_size *= 2; in ad9467_probe()
1209 st->clk = devm_clk_get_enabled(&spi->dev, "adc-clk"); in ad9467_probe()
1210 if (IS_ERR(st->clk)) in ad9467_probe()
1211 return PTR_ERR(st->clk); in ad9467_probe()
1213 st->pwrdown_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown", in ad9467_probe()
1215 if (IS_ERR(st->pwrdown_gpio)) in ad9467_probe()
1216 return PTR_ERR(st->pwrdown_gpio); in ad9467_probe()
1222 ret = ad9467_scale_fill(st); in ad9467_probe()
1226 id = ad9467_spi_read(st, AN877_ADC_REG_CHIP_ID); in ad9467_probe()
1227 if (id != st->info->id) { in ad9467_probe()
1229 id, st->info->id); in ad9467_probe()
1233 if (st->info->num_scales > 1) in ad9467_probe()
1237 indio_dev->name = st->info->name; in ad9467_probe()
1238 indio_dev->channels = st->info->channels; in ad9467_probe()
1239 indio_dev->num_channels = st->info->num_channels; in ad9467_probe()
1241 ret = ad9467_iio_backend_get(st); in ad9467_probe()
1245 ret = devm_iio_backend_request_buffer(&spi->dev, st->back, indio_dev); in ad9467_probe()
1249 ret = devm_iio_backend_enable(&spi->dev, st->back); in ad9467_probe()
1253 ret = ad9467_calibrate(st); in ad9467_probe()