Lines Matching refs:reg_offset
810 int reg_offset; member
824 .reg_offset = 0,
832 .reg_offset = 0,
840 .reg_offset = 1,
848 .reg_offset = 1,
855 .reg_offset = 1,
862 .reg_offset = 1,
869 .reg_offset = 1,
878 .reg_offset = 2,
885 .reg_offset = 2,
893 .reg_offset = 2,
901 .reg_offset = 0,
909 .reg_offset = 0,
917 .reg_offset = 1,
925 .reg_offset = 1,
933 .reg_offset = 2,
941 .reg_offset = 0,
949 .reg_offset = 0,
956 .reg_offset = 0,
963 .reg_offset = 0,
970 .reg_offset = 0,
977 .reg_offset = 0,
984 .reg_offset = 0,
992 .reg_offset = 1,
1001 .reg_offset = 1,
1010 .reg_offset = 1,
1019 .reg_offset = 2,
1027 .reg_offset = 2,
1035 .reg_offset = 2,
1043 .reg_offset = 3,
1051 .reg_offset = 3,
1060 .reg_offset = 0,
1069 .reg_offset = 0,
1078 .reg_offset = 0,
1088 .reg_offset = 1,
1097 .reg_offset = 1,
1105 .reg_offset = 0,
1113 .reg_offset = 0,
1121 .reg_offset = 0,
1129 .reg_offset = 0,
1137 .reg_offset = 1,
1145 .reg_offset = 1,
1153 .reg_offset = 0,
1162 .reg_offset = 0,
1170 .reg_offset = 0,
1179 .reg_offset = 0,
1187 .reg_offset = 0,
1195 .reg_offset = 1,
1203 .reg_offset = 1,
1212 .reg_offset = 9,
1222 .reg_offset = 9,
1232 .reg_offset = 9,
1242 .reg_offset = 9,
1252 .reg_offset = 10,
1262 .reg_offset = 10,
1272 .reg_offset = 10,
1282 .reg_offset = 10,
1291 .reg_offset = 0,
1301 .reg_offset = 0,
1311 .reg_offset = 1,
1319 .reg_offset = 1,
1327 .reg_offset = 2,
1335 .reg_offset = 2,
1343 .reg_offset = 3,
1352 .reg_offset = 3,
1361 .reg_offset = 20,
1371 .reg_offset = 21,
1381 .reg_offset = 21,
1391 .reg_offset = 22,
1400 .reg_offset = 23,
1408 .reg_offset = 0,
1415 .reg_offset = 1,
1424 .reg_offset = 2,
1432 .reg_offset = 3,
1440 .reg_offset = 4,
1449 .reg_offset = 5,
1457 .reg_offset = 6,
1466 .reg_offset = 7,
1474 .reg_offset = 8,
2069 int reg_offset = iqs7222_props[i].reg_offset; in iqs7222_parse_props() local
2094 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
2096 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
2104 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
2106 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
2127 setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1, in iqs7222_parse_props()
2129 setup[reg_offset] |= (val / val_pitch << reg_shift); in iqs7222_parse_props()
2452 int count, error, reg_offset, i; in iqs7222_parse_sldr() local
2487 reg_offset = dev_desc->sldr_res < U16_MAX ? 0 : 1; in iqs7222_parse_sldr()
2490 sldr_setup[3 + reg_offset] &= ~GENMASK(ext_chan - 1, 0); in iqs7222_parse_sldr()
2493 sldr_setup[5 + reg_offset + i] = 0; in iqs7222_parse_sldr()
2507 sldr_setup[3 + reg_offset] |= BIT(chan_sel[i]); in iqs7222_parse_sldr()
2508 sldr_setup[5 + reg_offset + i] = chan_sel[i] * 42 + 1080; in iqs7222_parse_sldr()
2511 sldr_setup[4 + reg_offset] = dev_desc->touch_link; in iqs7222_parse_sldr()
2513 sldr_setup[4 + reg_offset] -= 2; in iqs7222_parse_sldr()
2523 if (reg_offset) { in iqs7222_parse_sldr()
2536 if (!(reg_offset ? sldr_setup[3] in iqs7222_parse_sldr()
2545 if (val > (reg_offset ? U16_MAX : U8_MAX * 4)) { in iqs7222_parse_sldr()
2551 if (reg_offset) { in iqs7222_parse_sldr()
2567 if (!reg_offset) { in iqs7222_parse_sldr()
2595 if (!reg_offset) in iqs7222_parse_sldr()
2612 if (reg_offset) in iqs7222_parse_sldr()
2631 : sldr_setup[3 + reg_offset], in iqs7222_parse_sldr()
2633 : sldr_setup[4 + reg_offset], in iqs7222_parse_sldr()
2639 if (!reg_offset) in iqs7222_parse_sldr()
2650 if (i && !reg_offset) in iqs7222_parse_sldr()
2652 else if (sldr_setup[4 + reg_offset] == dev_desc->touch_link) in iqs7222_parse_sldr()