Lines Matching refs:m

27 	struct seq_file *m = filp->private_data;  in iommu_mmio_write()  local
28 struct amd_iommu *iommu = m->private; in iommu_mmio_write()
48 static int iommu_mmio_show(struct seq_file *m, void *unused) in iommu_mmio_show() argument
50 struct amd_iommu *iommu = m->private; in iommu_mmio_show()
54 seq_puts(m, "Please provide mmio register's offset\n"); in iommu_mmio_show()
59 seq_printf(m, "Offset:0x%x Value:0x%016llx\n", iommu->dbg_mmio_offset, value); in iommu_mmio_show()
68 struct seq_file *m = filp->private_data; in iommu_capability_write() local
69 struct amd_iommu *iommu = m->private; in iommu_capability_write()
90 static int iommu_capability_show(struct seq_file *m, void *unused) in iommu_capability_show() argument
92 struct amd_iommu *iommu = m->private; in iommu_capability_show()
97 seq_puts(m, "Please provide capability register's offset in the range [0x00 - 0x14]\n"); in iommu_capability_show()
103 seq_printf(m, "Not able to read capability register at 0x%x\n", in iommu_capability_show()
108 seq_printf(m, "Offset:0x%x Value:0x%08x\n", iommu->dbg_cap_offset, value); in iommu_capability_show()
114 static int iommu_cmdbuf_show(struct seq_file *m, void *unused) in iommu_cmdbuf_show() argument
116 struct amd_iommu *iommu = m->private; in iommu_cmdbuf_show()
125 seq_printf(m, "CMD Buffer Head Offset:%d Tail Offset:%d\n", in iommu_cmdbuf_show()
129 seq_printf(m, "%3d: %08x %08x %08x %08x\n", i, cmd->data[0], in iommu_cmdbuf_show()
197 static int devid_show(struct seq_file *m, void *unused) in devid_show() argument
203 seq_printf(m, "%04x:%02x:%02x.%x\n", PCI_SBDF_TO_SEGID(sbdf), in devid_show()
206 seq_puts(m, "No or Invalid input provided\n"); in devid_show()
212 static void dump_dte(struct seq_file *m, struct amd_iommu_pci_seg *pci_seg, u16 devid) in dump_dte() argument
223 seq_puts(m, "Device table not found"); in dump_dte()
227 seq_printf(m, "%-12s %16s %16s %16s %16s iommu\n", "DeviceId", in dump_dte()
229 seq_printf(m, "%04x:%02x:%02x.%x ", pci_seg->id, PCI_BUS_NUM(devid), in dump_dte()
232 seq_printf(m, "%016llx ", dev_table[devid].data[i]); in dump_dte()
233 seq_printf(m, "iommu%d\n", iommu->index); in dump_dte()
236 static int iommu_devtbl_show(struct seq_file *m, void *unused) in iommu_devtbl_show() argument
242 seq_puts(m, "Enter a valid device ID to 'devid' file\n"); in iommu_devtbl_show()
251 dump_dte(m, pci_seg, devid); in iommu_devtbl_show()
259 static void dump_128_irte(struct seq_file *m, struct irq_remap_table *table, u16 int_tab_len) in dump_128_irte() argument
273 seq_printf(m, "IRT[%04d] %016llx %016llx\n", index, irte->hi.val, irte->lo.val); in dump_128_irte()
277 static void dump_32_irte(struct seq_file *m, struct irq_remap_table *table, u16 int_tab_len) in dump_32_irte() argument
288 seq_printf(m, "IRT[%04d] %08x\n", index, irte->val); in dump_32_irte()
292 static void dump_irte(struct seq_file *m, u16 devid, struct amd_iommu_pci_seg *pci_seg) in dump_irte() argument
302 seq_printf(m, "IRQ lookup table not set for %04x:%02x:%02x:%x\n", in dump_irte()
313 seq_puts(m, "Device table not found"); in dump_irte()
319 seq_puts(m, "The device's DTE contains an invalid IRT length value."); in dump_irte()
323 seq_printf(m, "DeviceId %04x:%02x:%02x.%x\n", pci_seg->id, PCI_BUS_NUM(devid), in dump_irte()
328 dump_128_irte(m, table, BIT(int_tab_len >> 1)); in dump_irte()
330 dump_32_irte(m, table, BIT(int_tab_len >> 1)); in dump_irte()
331 seq_puts(m, "\n"); in dump_irte()
335 static int iommu_irqtbl_show(struct seq_file *m, void *unused) in iommu_irqtbl_show() argument
341 seq_puts(m, "Interrupt remapping is disabled\n"); in iommu_irqtbl_show()
346 seq_puts(m, "Enter a valid device ID to 'devid' file\n"); in iommu_irqtbl_show()
356 dump_irte(m, devid, pci_seg); in iommu_irqtbl_show()