Lines Matching refs:write

528 	priv->write(reg_mcr, &regs->mcr);  in flexcan_enable_wakeup_irq()
556 	priv->write(reg_mcr, &regs->mcr);  in flexcan_enter_stop_mode()
600 	priv->write(reg_mcr, &regs->mcr);  in flexcan_exit_stop_mode()
610 	priv->write(reg_ctrl, &regs->ctrl);  in flexcan_error_irq_enable()
618 	priv->write(reg_ctrl, &regs->ctrl);  in flexcan_error_irq_disable()
673 	priv->write(reg, &regs->mcr);  in flexcan_chip_enable()
685 	priv->write(reg, &regs->mcr);  in flexcan_chip_disable()
704 	priv->write(reg, &regs->mcr);  in flexcan_chip_freeze()
723 	priv->write(reg, &regs->mcr);  in flexcan_chip_unfreeze()
739 	priv->write(FLEXCAN_MCR_SOFTRST, &regs->mcr);  in flexcan_chip_softreset()
812 		priv->write(data, &priv->tx_mb->data[i / sizeof(u32)]);  in flexcan_start_xmit()
817 	priv->write(can_id, &priv->tx_mb->can_id);  in flexcan_start_xmit()
818 	priv->write(ctrl, &priv->tx_mb->can_ctrl);  in flexcan_start_xmit()
823 	priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,  in flexcan_start_xmit()
825 	priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,  in flexcan_start_xmit()
955 		priv->write(upper_32_bits(val), addr - 4);  in flexcan_write64()
957 		priv->write(lower_32_bits(val), addr);  in flexcan_write64()
1062 		priv->write(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, &regs->iflag1);  in flexcan_mailbox_read()
1108 			priv->write(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW,  in flexcan_irq()
1128 		priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,  in flexcan_irq()
1139 		priv->write(reg_esr & (FLEXCAN_ESR_ALL_INT | FLEXCAN_ESR_WAK_INT), &regs->esr);  in flexcan_irq()
1218 	priv->write(reg, &regs->ctrl);  in flexcan_set_bittiming_ctrl()
1253 	priv->write(reg_cbt, &regs->cbt);  in flexcan_set_bittiming_cbt()
1289 		priv->write(reg_fdcbt, &regs->fdcbt);  in flexcan_set_bittiming_cbt()
1298 		priv->write(reg_ctrl2, &regs->ctrl2);  in flexcan_set_bittiming_cbt()
1322 	priv->write(reg_fdctrl, &regs->fdctrl);  in flexcan_set_bittiming_cbt()
1349 	priv->write(reg, &regs->ctrl);  in flexcan_set_bittiming()
1373 	priv->write(reg_ctrl2, &regs->ctrl2);  in flexcan_ram_init()
1381 	priv->write(reg_ctrl2, &regs->ctrl2);  in flexcan_ram_init()
1436 	priv->write(priv->reg_ctrl_default, &regs->ctrl);  in flexcan_chip_interrupts_enable()
1438 	priv->write(upper_32_bits(reg_imask), &regs->imask2);  in flexcan_chip_interrupts_enable()
1439 	priv->write(lower_32_bits(reg_imask), &regs->imask1);  in flexcan_chip_interrupts_enable()
1448 	priv->write(0, &regs->imask2);  in flexcan_chip_interrupts_disable()
1449 	priv->write(0, &regs->imask1);  in flexcan_chip_interrupts_disable()
1450 	priv->write(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL,  in flexcan_chip_interrupts_disable()
1535 	priv->write(reg_mcr, &regs->mcr);  in flexcan_chip_start()
1568 	priv->write(reg_ctrl, &regs->ctrl);  in flexcan_chip_start()
1573 		priv->write(reg_ctrl2, &regs->ctrl2);  in flexcan_chip_start()
1599 		priv->write(reg_fdctrl, &regs->fdctrl);  in flexcan_chip_start()
1605 			priv->write(FLEXCAN_MB_CODE_RX_EMPTY,  in flexcan_chip_start()
1612 			priv->write(FLEXCAN_MB_CODE_RX_INACTIVE,  in flexcan_chip_start()
1618 	priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,  in flexcan_chip_start()
1622 	priv->write(FLEXCAN_MB_CODE_TX_INACTIVE,  in flexcan_chip_start()
1626 	priv->write(0x0, &regs->rxgmask);  in flexcan_chip_start()
1627 	priv->write(0x0, &regs->rx14mask);  in flexcan_chip_start()
1628 	priv->write(0x0, &regs->rx15mask);  in flexcan_chip_start()
1631 		priv->write(0x0, &regs->rxfgmask);  in flexcan_chip_start()
1635 		priv->write(0, &regs->rximr[i]);  in flexcan_chip_start()
1654 		priv->write(reg_ctrl2, &regs->ctrl2);  in flexcan_chip_start()
1659 		priv->write(reg_mecr, &regs->mecr);  in flexcan_chip_start()
1664 		priv->write(reg_mecr, &regs->mecr);  in flexcan_chip_start()
1670 		priv->write(reg_mecr, &regs->mecr);  in flexcan_chip_start()
1673 		priv->write(reg_ctrl2, &regs->ctrl2);  in flexcan_chip_start()
1893 	priv->write(reg, &regs->ctrl);  in register_flexcandev()
1907 	priv->write(reg, &regs->mcr);  in register_flexcandev()
2194 		priv->write = flexcan_write_be;  in flexcan_probe()
2197 		priv->write = flexcan_write_le;  in flexcan_probe()