Lines Matching refs:cpu_reg
3832 load_cpu_fw(struct bnx2 *bp, const struct cpu_reg *cpu_reg, in load_cpu_fw() argument
3841 val = bnx2_reg_rd_ind(bp, cpu_reg->mode); in load_cpu_fw()
3842 val |= cpu_reg->mode_value_halt; in load_cpu_fw()
3843 bnx2_reg_wr_ind(bp, cpu_reg->mode, val); in load_cpu_fw()
3844 bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); in load_cpu_fw()
3852 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw()
3866 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw()
3880 offset = cpu_reg->spad_base + (addr - cpu_reg->mips_view_base); in load_cpu_fw()
3889 bnx2_reg_wr_ind(bp, cpu_reg->inst, 0); in load_cpu_fw()
3892 bnx2_reg_wr_ind(bp, cpu_reg->pc, val); in load_cpu_fw()
3895 val = bnx2_reg_rd_ind(bp, cpu_reg->mode); in load_cpu_fw()
3896 val &= ~cpu_reg->mode_value_halt; in load_cpu_fw()
3897 bnx2_reg_wr_ind(bp, cpu_reg->state, cpu_reg->state_value_clear); in load_cpu_fw()
3898 bnx2_reg_wr_ind(bp, cpu_reg->mode, val); in load_cpu_fw()