Lines Matching refs:pdma
49 .pdma = {
99 .pdma = {
115 .pdma = {
166 .pdma = {
1058 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
1059 mtk_w32(eth, val & ~mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_disable()
1069 val = mtk_r32(eth, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
1070 mtk_w32(eth, val | mask, eth->soc->reg_map->pdma.irq_mask); in mtk_rx_irq_enable()
2605 reg_map->pdma.irq_status); in mtk_napi_rx()
2612 mtk_r32(eth, reg_map->pdma.irq_status), in mtk_napi_rx()
2613 mtk_r32(eth, reg_map->pdma.irq_mask)); in mtk_napi_rx()
2619 } while (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_napi_rx()
2725 mtk_w32(eth, MT7628_PST_DTX_IDX0, soc->reg_map->pdma.rst_idx); in mtk_tx_alloc()
2867 ring->crx_idx_reg = reg_map->pdma.pcrx_ptr + in mtk_rx_alloc()
2883 reg_map->pdma.rx_ptr + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2885 reg_map->pdma.rx_cnt_cfg + ring_no * MTK_QRX_OFFSET); in mtk_rx_alloc()
2887 reg_map->pdma.rst_idx); in mtk_rx_alloc()
3210 reg = eth->soc->reg_map->pdma.glo_cfg; in mtk_dma_busy_wait()
3419 if (mtk_r32(eth, reg_map->pdma.irq_mask) & in mtk_handle_irq()
3421 if (mtk_r32(eth, reg_map->pdma.irq_status) & in mtk_handle_irq()
3476 reg_map->pdma.glo_cfg); in mtk_start_dma()
3480 reg_map->pdma.glo_cfg); in mtk_start_dma()
3711 mtk_stop_dma(eth, eth->soc->reg_map->pdma.glo_cfg); in mtk_stop()
3815 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_rx()
3825 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_rx()
3846 val = mtk_r32(eth, reg_map->pdma.delay_irq); in mtk_dim_tx()
3856 mtk_w32(eth, val, reg_map->pdma.delay_irq); in mtk_dim_tx()
4038 adma_busy = !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & GENMASK(4, 0)) && in mtk_hw_check_dma_hang()
4039 !(mtk_r32(eth, reg_map->pdma.adma_rx_dbg0) & BIT(6)); in mtk_hw_check_dma_hang()
4181 mtk_w32(eth, MTK_TX_DONE_INT, reg_map->pdma.int_grp); in mtk_hw_init()
4182 mtk_w32(eth, eth->soc->rx.irq_done_mask, reg_map->pdma.int_grp + 4); in mtk_hw_init()