Lines Matching refs:xpcs
114 int (*pma_config)(struct dw_xpcs *xpcs);
124 xpcs_find_compat(struct dw_xpcs *xpcs, phy_interface_t interface) in xpcs_find_compat() argument
128 for (compat = xpcs->desc->compat; compat->supported; compat++) in xpcs_find_compat()
135 struct phylink_pcs *xpcs_to_phylink_pcs(struct dw_xpcs *xpcs) in xpcs_to_phylink_pcs() argument
137 return &xpcs->pcs; in xpcs_to_phylink_pcs()
141 int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface) in xpcs_get_an_mode() argument
145 compat = xpcs_find_compat(xpcs, interface); in xpcs_get_an_mode()
168 int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg) in xpcs_read() argument
170 return mdiodev_c45_read(xpcs->mdiodev, dev, reg); in xpcs_read()
173 int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val) in xpcs_write() argument
175 return mdiodev_c45_write(xpcs->mdiodev, dev, reg, val); in xpcs_write()
178 int xpcs_modify(struct dw_xpcs *xpcs, int dev, u32 reg, u16 mask, u16 set) in xpcs_modify() argument
180 return mdiodev_c45_modify(xpcs->mdiodev, dev, reg, mask, set); in xpcs_modify()
183 static int xpcs_modify_changed(struct dw_xpcs *xpcs, int dev, u32 reg, in xpcs_modify_changed() argument
186 return mdiodev_c45_modify_changed(xpcs->mdiodev, dev, reg, mask, set); in xpcs_modify_changed()
189 static int xpcs_read_vendor(struct dw_xpcs *xpcs, int dev, u32 reg) in xpcs_read_vendor() argument
191 return xpcs_read(xpcs, dev, DW_VENDOR | reg); in xpcs_read_vendor()
194 static int xpcs_write_vendor(struct dw_xpcs *xpcs, int dev, int reg, in xpcs_write_vendor() argument
197 return xpcs_write(xpcs, dev, DW_VENDOR | reg, val); in xpcs_write_vendor()
200 static int xpcs_modify_vendor(struct dw_xpcs *xpcs, int dev, int reg, u16 mask, in xpcs_modify_vendor() argument
203 return xpcs_modify(xpcs, dev, DW_VENDOR | reg, mask, set); in xpcs_modify_vendor()
206 int xpcs_read_vpcs(struct dw_xpcs *xpcs, int reg) in xpcs_read_vpcs() argument
208 return xpcs_read_vendor(xpcs, MDIO_MMD_PCS, reg); in xpcs_read_vpcs()
211 int xpcs_write_vpcs(struct dw_xpcs *xpcs, int reg, u16 val) in xpcs_write_vpcs() argument
213 return xpcs_write_vendor(xpcs, MDIO_MMD_PCS, reg, val); in xpcs_write_vpcs()
216 static int xpcs_modify_vpcs(struct dw_xpcs *xpcs, int reg, u16 mask, u16 val) in xpcs_modify_vpcs() argument
218 return xpcs_modify_vendor(xpcs, MDIO_MMD_PCS, reg, mask, val); in xpcs_modify_vpcs()
221 static int xpcs_poll_reset(struct dw_xpcs *xpcs, int dev) in xpcs_poll_reset() argument
227 50000, 600000, true, xpcs, dev, MII_BMCR); in xpcs_poll_reset()
234 static int xpcs_soft_reset(struct dw_xpcs *xpcs, in xpcs_soft_reset() argument
253 ret = xpcs_write(xpcs, dev, MII_BMCR, BMCR_RESET); in xpcs_soft_reset()
257 return xpcs_poll_reset(xpcs, dev); in xpcs_soft_reset()
266 static int xpcs_read_fault_c73(struct dw_xpcs *xpcs, in xpcs_read_fault_c73() argument
273 xpcs_warn(xpcs, state, "Link fault condition detected!\n"); in xpcs_read_fault_c73()
277 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT2); in xpcs_read_fault_c73()
282 xpcs_warn(xpcs, state, "Receiver fault detected!\n"); in xpcs_read_fault_c73()
284 xpcs_warn(xpcs, state, "Transmitter fault detected!\n"); in xpcs_read_fault_c73()
286 ret = xpcs_read_vendor(xpcs, MDIO_MMD_PCS, DW_VR_XS_PCS_DIG_STS); in xpcs_read_fault_c73()
291 xpcs_warn(xpcs, state, "FIFO fault condition detected!\n"); in xpcs_read_fault_c73()
295 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT1); in xpcs_read_fault_c73()
300 xpcs_warn(xpcs, state, "Link is not locked!\n"); in xpcs_read_fault_c73()
302 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_PCS_10GBRT_STAT2); in xpcs_read_fault_c73()
307 xpcs_warn(xpcs, state, "Link has errors!\n"); in xpcs_read_fault_c73()
314 static void xpcs_link_up_usxgmii(struct dw_xpcs *xpcs, int speed) in xpcs_link_up_usxgmii() argument
342 ret = xpcs_modify_vpcs(xpcs, MDIO_CTRL1, DW_USXGMII_EN, DW_USXGMII_EN); in xpcs_link_up_usxgmii()
346 ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, MII_BMCR, DW_USXGMII_SS_MASK, in xpcs_link_up_usxgmii()
351 ret = xpcs_modify_vpcs(xpcs, MDIO_CTRL1, DW_USXGMII_RST, in xpcs_link_up_usxgmii()
359 dev_err(&xpcs->mdiodev->dev, "%s: XPCS access returned %pe\n", in xpcs_link_up_usxgmii()
363 static int _xpcs_config_aneg_c73(struct dw_xpcs *xpcs, in _xpcs_config_aneg_c73() argument
381 ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV3, adv); in _xpcs_config_aneg_c73()
394 ret = xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV2, adv); in _xpcs_config_aneg_c73()
405 return xpcs_write(xpcs, MDIO_MMD_AN, DW_SR_AN_ADV1, adv); in _xpcs_config_aneg_c73()
408 static int xpcs_config_aneg_c73(struct dw_xpcs *xpcs, in xpcs_config_aneg_c73() argument
413 ret = _xpcs_config_aneg_c73(xpcs, compat); in xpcs_config_aneg_c73()
417 return xpcs_modify(xpcs, MDIO_MMD_AN, MDIO_CTRL1, in xpcs_config_aneg_c73()
422 static int xpcs_aneg_done_c73(struct dw_xpcs *xpcs, in xpcs_aneg_done_c73() argument
429 ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_AN_LPA); in xpcs_aneg_done_c73()
435 xpcs_config_aneg_c73(xpcs, compat); in xpcs_aneg_done_c73()
445 static int xpcs_read_lpa_c73(struct dw_xpcs *xpcs, in xpcs_read_lpa_c73() argument
460 ret = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_AN_LPA + i); in xpcs_read_lpa_c73()
472 static int xpcs_get_max_xlgmii_speed(struct dw_xpcs *xpcs, in xpcs_get_max_xlgmii_speed() argument
526 static void xpcs_resolve_pma(struct dw_xpcs *xpcs, in xpcs_resolve_pma() argument
537 state->speed = xpcs_get_max_xlgmii_speed(xpcs, state); in xpcs_resolve_pma()
550 struct dw_xpcs *xpcs; in xpcs_validate() local
553 xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_validate()
554 compat = xpcs_find_compat(xpcs, state->interface); in xpcs_validate()
573 struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_inband_caps() local
576 compat = xpcs_find_compat(xpcs, interface); in xpcs_inband_caps()
597 static void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces) in xpcs_get_interfaces() argument
601 for (compat = xpcs->desc->compat; compat->supported; compat++) in xpcs_get_interfaces()
605 static int xpcs_switch_interface_mode(struct dw_xpcs *xpcs, in xpcs_switch_interface_mode() argument
610 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { in xpcs_switch_interface_mode()
611 ret = txgbe_xpcs_switch_mode(xpcs, interface); in xpcs_switch_interface_mode()
612 } else if (xpcs->interface != interface) { in xpcs_switch_interface_mode()
614 xpcs->need_reset = true; in xpcs_switch_interface_mode()
615 xpcs->interface = interface; in xpcs_switch_interface_mode()
623 struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_pre_config() local
627 ret = xpcs_switch_interface_mode(xpcs, interface); in xpcs_pre_config()
629 dev_err(&xpcs->mdiodev->dev, "switch interface failed: %pe\n", in xpcs_pre_config()
632 if (!xpcs->need_reset) in xpcs_pre_config()
635 compat = xpcs_find_compat(xpcs, interface); in xpcs_pre_config()
637 dev_err(&xpcs->mdiodev->dev, "unsupported interface %s\n", in xpcs_pre_config()
642 ret = xpcs_soft_reset(xpcs, compat); in xpcs_pre_config()
644 dev_err(&xpcs->mdiodev->dev, "soft reset failed: %pe\n", in xpcs_pre_config()
647 xpcs->need_reset = false; in xpcs_pre_config()
650 static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, in xpcs_config_aneg_c37_sgmii() argument
674 mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMCR); in xpcs_config_aneg_c37_sgmii()
679 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_BMCR, in xpcs_config_aneg_c37_sgmii()
689 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { in xpcs_config_aneg_c37_sgmii()
700 ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, mask, val); in xpcs_config_aneg_c37_sgmii()
710 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { in xpcs_config_aneg_c37_sgmii()
715 ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, mask, val); in xpcs_config_aneg_c37_sgmii()
720 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_BMCR, in xpcs_config_aneg_c37_sgmii()
726 static int xpcs_config_aneg_c37_1000basex(struct dw_xpcs *xpcs, in xpcs_config_aneg_c37_1000basex() argument
742 mdio_ctrl = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMCR); in xpcs_config_aneg_c37_1000basex()
747 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_BMCR, in xpcs_config_aneg_c37_1000basex()
757 if (!xpcs->pcs.poll) { in xpcs_config_aneg_c37_1000basex()
762 ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_CTRL, mask, val); in xpcs_config_aneg_c37_1000basex()
772 ret = xpcs_modify_changed(xpcs, MDIO_MMD_VEND2, in xpcs_config_aneg_c37_1000basex()
781 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0); in xpcs_config_aneg_c37_1000basex()
786 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_BMCR, in xpcs_config_aneg_c37_1000basex()
795 static int xpcs_config_2500basex(struct dw_xpcs *xpcs) in xpcs_config_2500basex() argument
799 ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, in xpcs_config_2500basex()
806 return xpcs_modify(xpcs, MDIO_MMD_VEND2, MII_BMCR, in xpcs_config_2500basex()
811 static int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface, in xpcs_do_config() argument
818 compat = xpcs_find_compat(xpcs, interface); in xpcs_do_config()
822 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { in xpcs_do_config()
828 xpcs_write_vpcs(xpcs, DW_VR_XS_PCS_DIG_CTRL1, in xpcs_do_config()
837 ret = xpcs_config_aneg_c73(xpcs, compat); in xpcs_do_config()
843 ret = xpcs_config_aneg_c37_sgmii(xpcs, neg_mode); in xpcs_do_config()
848 ret = xpcs_config_aneg_c37_1000basex(xpcs, neg_mode, in xpcs_do_config()
854 ret = xpcs_config_2500basex(xpcs); in xpcs_do_config()
863 ret = compat->pma_config(xpcs); in xpcs_do_config()
876 struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_config() local
878 return xpcs_do_config(xpcs, interface, advertising, neg_mode); in xpcs_config()
881 static int xpcs_get_state_c73(struct dw_xpcs *xpcs, in xpcs_get_state_c73() argument
894 pcs_stat1 = xpcs_read(xpcs, MDIO_MMD_PCS, MDIO_STAT1); in xpcs_get_state_c73()
904 ret = xpcs_read_fault_c73(xpcs, state, pcs_stat1); in xpcs_get_state_c73()
906 ret = xpcs_soft_reset(xpcs, compat); in xpcs_get_state_c73()
912 return xpcs_do_config(xpcs, state->interface, NULL, in xpcs_get_state_c73()
927 an_stat1 = xpcs_read(xpcs, MDIO_MMD_AN, MDIO_STAT1); in xpcs_get_state_c73()
933 state->an_complete = xpcs_aneg_done_c73(xpcs, state, compat, in xpcs_get_state_c73()
940 ret = xpcs_read_lpa_c73(xpcs, state, an_stat1); in xpcs_get_state_c73()
948 xpcs_resolve_pma(xpcs, state); in xpcs_get_state_c73()
954 static int xpcs_get_state_c37_sgmii(struct dw_xpcs *xpcs, in xpcs_get_state_c37_sgmii() argument
968 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS); in xpcs_get_state_c37_sgmii()
994 speed = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMCR); in xpcs_get_state_c37_sgmii()
1006 duplex = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_ADVERTISE); in xpcs_get_state_c37_sgmii()
1015 xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, 0); in xpcs_get_state_c37_sgmii()
1021 static int xpcs_get_state_c37_1000basex(struct dw_xpcs *xpcs, in xpcs_get_state_c37_1000basex() argument
1032 lpa = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_LPA); in xpcs_get_state_c37_1000basex()
1036 bmsr = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMSR); in xpcs_get_state_c37_1000basex()
1041 if (!xpcs->pcs.poll) { in xpcs_get_state_c37_1000basex()
1044 an_intr = xpcs_read(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS); in xpcs_get_state_c37_1000basex()
1047 xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_AN_INTR_STS, an_intr); in xpcs_get_state_c37_1000basex()
1057 static int xpcs_get_state_2500basex(struct dw_xpcs *xpcs, in xpcs_get_state_2500basex() argument
1062 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_BMSR); in xpcs_get_state_2500basex()
1082 struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_get_state() local
1086 compat = xpcs_find_compat(xpcs, state->interface); in xpcs_get_state()
1092 phylink_mii_c45_pcs_get_state(xpcs->mdiodev, state); in xpcs_get_state()
1095 ret = xpcs_get_state_c73(xpcs, state, compat); in xpcs_get_state()
1097 dev_err(&xpcs->mdiodev->dev, "%s returned %pe\n", in xpcs_get_state()
1101 ret = xpcs_get_state_c37_sgmii(xpcs, state); in xpcs_get_state()
1103 dev_err(&xpcs->mdiodev->dev, "%s returned %pe\n", in xpcs_get_state()
1107 ret = xpcs_get_state_c37_1000basex(xpcs, neg_mode, state); in xpcs_get_state()
1109 dev_err(&xpcs->mdiodev->dev, "%s returned %pe\n", in xpcs_get_state()
1113 ret = xpcs_get_state_2500basex(xpcs, state); in xpcs_get_state()
1115 dev_err(&xpcs->mdiodev->dev, "%s returned %pe\n", in xpcs_get_state()
1123 static void xpcs_link_up_sgmii_1000basex(struct dw_xpcs *xpcs, in xpcs_link_up_sgmii_1000basex() argument
1135 dev_err(&xpcs->mdiodev->dev, in xpcs_link_up_sgmii_1000basex()
1142 dev_err(&xpcs->mdiodev->dev, in xpcs_link_up_sgmii_1000basex()
1147 ret = xpcs_write(xpcs, MDIO_MMD_VEND2, MII_BMCR, in xpcs_link_up_sgmii_1000basex()
1150 dev_err(&xpcs->mdiodev->dev, "%s: xpcs_write returned %pe\n", in xpcs_link_up_sgmii_1000basex()
1157 struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_link_up() local
1161 xpcs_link_up_usxgmii(xpcs, speed); in xpcs_link_up()
1166 xpcs_link_up_sgmii_1000basex(xpcs, neg_mode, interface, speed, in xpcs_link_up()
1177 struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_an_restart() local
1179 xpcs_modify(xpcs, MDIO_MMD_VEND2, MII_BMCR, BMCR_ANRESTART, in xpcs_an_restart()
1183 static int xpcs_config_eee(struct dw_xpcs *xpcs, bool enable) in xpcs_config_eee() argument
1198 xpcs->eee_mult_fact); in xpcs_config_eee()
1202 ret = xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL0, mask, in xpcs_config_eee()
1207 return xpcs_modify(xpcs, MDIO_MMD_VEND2, DW_VR_MII_EEE_MCTRL1, in xpcs_config_eee()
1214 struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_disable_eee() local
1216 xpcs_config_eee(xpcs, false); in xpcs_disable_eee()
1221 struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); in xpcs_enable_eee() local
1223 xpcs_config_eee(xpcs, true); in xpcs_enable_eee()
1234 void xpcs_config_eee_mult_fact(struct dw_xpcs *xpcs, u8 mult_fact) in xpcs_config_eee_mult_fact() argument
1236 xpcs->eee_mult_fact = mult_fact; in xpcs_config_eee_mult_fact()
1240 static int xpcs_read_ids(struct dw_xpcs *xpcs) in xpcs_read_ids() argument
1248 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID1); in xpcs_read_ids()
1254 ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID2); in xpcs_read_ids()
1265 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID1); in xpcs_read_ids()
1271 ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID2); in xpcs_read_ids()
1279 if (xpcs->info.pcs == DW_XPCS_ID_NATIVE) in xpcs_read_ids()
1280 xpcs->info.pcs = id; in xpcs_read_ids()
1283 ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID1); in xpcs_read_ids()
1289 ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID2); in xpcs_read_ids()
1300 if (xpcs->info.pma == DW_XPCS_PMA_ID_NATIVE) in xpcs_read_ids()
1301 xpcs->info.pma = id; in xpcs_read_ids()
1392 static int xpcs_identify(struct dw_xpcs *xpcs) in xpcs_identify() argument
1396 ret = xpcs_read_ids(xpcs); in xpcs_identify()
1403 if ((xpcs->info.pcs & entry->mask) == entry->id) { in xpcs_identify()
1404 xpcs->desc = entry; in xpcs_identify()
1414 struct dw_xpcs *xpcs; in xpcs_create_data() local
1416 xpcs = kzalloc(sizeof(*xpcs), GFP_KERNEL); in xpcs_create_data()
1417 if (!xpcs) in xpcs_create_data()
1421 xpcs->mdiodev = mdiodev; in xpcs_create_data()
1422 xpcs->pcs.ops = &xpcs_phylink_ops; in xpcs_create_data()
1423 xpcs->pcs.poll = true; in xpcs_create_data()
1425 return xpcs; in xpcs_create_data()
1428 static void xpcs_free_data(struct dw_xpcs *xpcs) in xpcs_free_data() argument
1430 mdio_device_put(xpcs->mdiodev); in xpcs_free_data()
1431 kfree(xpcs); in xpcs_free_data()
1434 static int xpcs_init_clks(struct dw_xpcs *xpcs) in xpcs_init_clks() argument
1440 struct device *dev = &xpcs->mdiodev->dev; in xpcs_init_clks()
1444 xpcs->clks[i].id = ids[i]; in xpcs_init_clks()
1446 ret = clk_bulk_get_optional(dev, DW_XPCS_NUM_CLKS, xpcs->clks); in xpcs_init_clks()
1450 ret = clk_bulk_prepare_enable(DW_XPCS_NUM_CLKS, xpcs->clks); in xpcs_init_clks()
1457 static void xpcs_clear_clks(struct dw_xpcs *xpcs) in xpcs_clear_clks() argument
1459 clk_bulk_disable_unprepare(DW_XPCS_NUM_CLKS, xpcs->clks); in xpcs_clear_clks()
1461 clk_bulk_put(DW_XPCS_NUM_CLKS, xpcs->clks); in xpcs_clear_clks()
1464 static int xpcs_init_id(struct dw_xpcs *xpcs) in xpcs_init_id() argument
1468 info = dev_get_platdata(&xpcs->mdiodev->dev); in xpcs_init_id()
1470 xpcs->info.pcs = DW_XPCS_ID_NATIVE; in xpcs_init_id()
1471 xpcs->info.pma = DW_XPCS_PMA_ID_NATIVE; in xpcs_init_id()
1473 xpcs->info = *info; in xpcs_init_id()
1476 return xpcs_identify(xpcs); in xpcs_init_id()
1481 struct dw_xpcs *xpcs; in xpcs_create() local
1484 xpcs = xpcs_create_data(mdiodev); in xpcs_create()
1485 if (IS_ERR(xpcs)) in xpcs_create()
1486 return xpcs; in xpcs_create()
1488 ret = xpcs_init_clks(xpcs); in xpcs_create()
1492 ret = xpcs_init_id(xpcs); in xpcs_create()
1496 xpcs_get_interfaces(xpcs, xpcs->pcs.supported_interfaces); in xpcs_create()
1498 if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) in xpcs_create()
1499 xpcs->pcs.poll = false; in xpcs_create()
1501 xpcs->need_reset = true; in xpcs_create()
1503 return xpcs; in xpcs_create()
1506 xpcs_clear_clks(xpcs); in xpcs_create()
1509 xpcs_free_data(xpcs); in xpcs_create()
1526 struct dw_xpcs *xpcs; in xpcs_create_mdiodev() local
1532 xpcs = xpcs_create(mdiodev); in xpcs_create_mdiodev()
1542 return xpcs; in xpcs_create_mdiodev()
1548 struct dw_xpcs *xpcs; in xpcs_create_pcs_mdiodev() local
1550 xpcs = xpcs_create_mdiodev(bus, addr); in xpcs_create_pcs_mdiodev()
1551 if (IS_ERR(xpcs)) in xpcs_create_pcs_mdiodev()
1552 return ERR_CAST(xpcs); in xpcs_create_pcs_mdiodev()
1554 return &xpcs->pcs; in xpcs_create_pcs_mdiodev()
1571 struct dw_xpcs *xpcs; in xpcs_create_fwnode() local
1580 xpcs = xpcs_create(mdiodev); in xpcs_create_fwnode()
1590 return xpcs; in xpcs_create_fwnode()
1594 void xpcs_destroy(struct dw_xpcs *xpcs) in xpcs_destroy() argument
1596 if (!xpcs) in xpcs_destroy()
1599 xpcs_clear_clks(xpcs); in xpcs_destroy()
1601 xpcs_free_data(xpcs); in xpcs_destroy()