Lines Matching refs:phy_write_mmd
892 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_DEVID1, 0xB61A); in ksz8061_config_init()
1104 return phy_write_mmd(phydev, 2, reg, newval); in ksz9031_of_load_skew_values()
1112 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_HI, in ksz9031_center_flp_timing()
1117 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_LO, in ksz9031_center_flp_timing()
1133 return phy_write_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD, in ksz9031_enable_edpd()
1171 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_CONTROL_PAD_SKEW, in ksz9031_config_rgmii_delay()
1177 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_RX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay()
1185 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_TX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay()
1193 return phy_write_mmd(phydev, 2, MII_KSZ9031RN_CLK_PAD_SKEW, in ksz9031_config_rgmii_delay()
1346 return phy_write_mmd(phydev, 2, reg, newval); in ksz9131_of_load_skew_values()
2075 err = phy_write_mmd(phydev, errata->dev_addr, errata->reg_addr, errata->val); in ksz9477_phy_errata()
2484 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_DEVID1, 0xB61A); in ksz8061_resume()
4373 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4375 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4377 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4379 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4381 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4383 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4387 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4389 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4393 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4396 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4406 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4409 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4420 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4425 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, in lan8841_config_init()
4427 phy_write_mmd(phydev, LAN8841_MMD_TIMER_REG, in lan8841_config_init()
4557 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_SEL, in lan8841_gpio_process_cap()
4581 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_SEL, 0); in lan8841_gpio_process_cap()
4769 phy_write_mmd(phydev, 2, LAN8841_PTP_RX_PARSE_CONFIG, rxcfg); in lan8841_hwtstamp()
4770 phy_write_mmd(phydev, 2, LAN8841_PTP_TX_PARSE_CONFIG, txcfg); in lan8841_hwtstamp()
4774 phy_write_mmd(phydev, 2, LAN8841_PTP_RX_TIMESTAMP_EN, pkt_ts_enable); in lan8841_hwtstamp()
4775 phy_write_mmd(phydev, 2, LAN8841_PTP_TX_TIMESTAMP_EN, pkt_ts_enable); in lan8841_hwtstamp()
4852 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_SEC_HI(event), in lan8841_ptp_set_target()
4857 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_SEC_LO(event), in lan8841_ptp_set_target()
4862 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_NS_HI(event) & 0x3fff, in lan8841_ptp_set_target()
4867 return phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_NS_LO(event), in lan8841_ptp_set_target()
4891 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_SEC_HI(event), in lan8841_ptp_set_reload()
4896 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_SEC_LO(event), in lan8841_ptp_set_reload()
4901 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_NS_HI(event) & 0x3fff, in lan8841_ptp_set_reload()
4906 return phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_NS_LO(event), in lan8841_ptp_set_reload()
4928 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_LO, lower_16_bits(ts->tv_sec)); in lan8841_ptp_settime64()
4929 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_MID, upper_16_bits(ts->tv_sec)); in lan8841_ptp_settime64()
4930 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_HI, upper_32_bits(ts->tv_sec) & 0xffff); in lan8841_ptp_settime64()
4931 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_NS_LO, lower_16_bits(ts->tv_nsec)); in lan8841_ptp_settime64()
4932 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_NS_HI, upper_16_bits(ts->tv_nsec) & 0x3fff); in lan8841_ptp_settime64()
4935 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_settime64()
4965 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_gettime64()
4994 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_getseconds()
5070 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_LO, sec); in lan8841_ptp_adjtime()
5071 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_HI, in lan8841_ptp_adjtime()
5073 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_adjtime()
5078 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_LO, in lan8841_ptp_adjtime()
5080 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_HI, in lan8841_ptp_adjtime()
5082 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_adjtime()
5120 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_RATE_ADJ_HI, in lan8841_ptp_adjfine()
5123 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_RATE_ADJ_LO, lower_16_bits(rate)); in lan8841_ptp_adjfine()
5426 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_CAP_EN, tmp); in lan8841_ptp_extts_on()