Lines Matching refs:phydev
17 int at803x_debug_reg_read(struct phy_device *phydev, u16 reg) in at803x_debug_reg_read() argument
21 ret = phy_write(phydev, AT803X_DEBUG_ADDR, reg); in at803x_debug_reg_read()
25 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read()
29 int at803x_debug_reg_mask(struct phy_device *phydev, u16 reg, in at803x_debug_reg_mask() argument
35 ret = at803x_debug_reg_read(phydev, reg); in at803x_debug_reg_mask()
43 return phy_write(phydev, AT803X_DEBUG_DATA, val); in at803x_debug_reg_mask()
47 int at803x_debug_reg_write(struct phy_device *phydev, u16 reg, u16 data) in at803x_debug_reg_write() argument
51 ret = phy_write(phydev, AT803X_DEBUG_ADDR, reg); in at803x_debug_reg_write()
55 return phy_write(phydev, AT803X_DEBUG_DATA, data); in at803x_debug_reg_write()
59 int at803x_set_wol(struct phy_device *phydev, in at803x_set_wol() argument
65 struct net_device *ndev = phydev->attached_dev; in at803x_set_wol()
83 phy_write_mmd(phydev, MDIO_MMD_PCS, offsets[i], in at803x_set_wol()
87 ret = phy_modify(phydev, AT803X_INTR_ENABLE, 0, AT803X_INTR_ENABLE_WOL); in at803x_set_wol()
92 ret = phy_modify(phydev, AT803X_INTR_ENABLE, AT803X_INTR_ENABLE_WOL, 0); in at803x_set_wol()
98 ret = phy_read(phydev, AT803X_INTR_STATUS); in at803x_set_wol()
106 irq_enabled = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol()
111 if (ret & irq_enabled && !phy_polling_mode(phydev)) in at803x_set_wol()
112 phy_trigger_machine(phydev); in at803x_set_wol()
118 int at8031_set_wol(struct phy_device *phydev, in at8031_set_wol() argument
124 ret = at803x_set_wol(phydev, wol); in at8031_set_wol()
130 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, in at8031_set_wol()
135 ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, in at8031_set_wol()
143 void at803x_get_wol(struct phy_device *phydev, in at803x_get_wol() argument
151 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_get_wol()
160 int at803x_ack_interrupt(struct phy_device *phydev) in at803x_ack_interrupt() argument
164 err = phy_read(phydev, AT803X_INTR_STATUS); in at803x_ack_interrupt()
170 int at803x_config_intr(struct phy_device *phydev) in at803x_config_intr() argument
175 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_config_intr()
177 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in at803x_config_intr()
179 err = at803x_ack_interrupt(phydev); in at803x_config_intr()
189 err = phy_write(phydev, AT803X_INTR_ENABLE, value); in at803x_config_intr()
191 err = phy_write(phydev, AT803X_INTR_ENABLE, 0); in at803x_config_intr()
196 err = at803x_ack_interrupt(phydev); in at803x_config_intr()
203 irqreturn_t at803x_handle_interrupt(struct phy_device *phydev) in at803x_handle_interrupt() argument
207 irq_status = phy_read(phydev, AT803X_INTR_STATUS); in at803x_handle_interrupt()
209 phy_error(phydev); in at803x_handle_interrupt()
214 int_enabled = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_handle_interrupt()
216 phy_error(phydev); in at803x_handle_interrupt()
224 phy_trigger_machine(phydev); in at803x_handle_interrupt()
230 int at803x_read_specific_status(struct phy_device *phydev, in at803x_read_specific_status() argument
239 ss = phy_read(phydev, AT803X_SPECIFIC_STATUS); in at803x_read_specific_status()
246 sfc = phy_read(phydev, AT803X_SPECIFIC_FUNCTION_CONTROL); in at803x_read_specific_status()
255 phydev->speed = SPEED_10; in at803x_read_specific_status()
258 phydev->speed = SPEED_100; in at803x_read_specific_status()
261 phydev->speed = SPEED_1000; in at803x_read_specific_status()
264 phydev->speed = SPEED_2500; in at803x_read_specific_status()
268 phydev->duplex = DUPLEX_FULL; in at803x_read_specific_status()
270 phydev->duplex = DUPLEX_HALF; in at803x_read_specific_status()
273 phydev->mdix = ETH_TP_MDI_X; in at803x_read_specific_status()
275 phydev->mdix = ETH_TP_MDI; in at803x_read_specific_status()
279 phydev->mdix_ctrl = ETH_TP_MDI; in at803x_read_specific_status()
282 phydev->mdix_ctrl = ETH_TP_MDI_X; in at803x_read_specific_status()
285 phydev->mdix_ctrl = ETH_TP_MDI_AUTO; in at803x_read_specific_status()
294 int at803x_config_mdix(struct phy_device *phydev, u8 ctrl) in at803x_config_mdix() argument
312 return phy_modify_changed(phydev, AT803X_SPECIFIC_FUNCTION_CONTROL, in at803x_config_mdix()
318 int at803x_prepare_config_aneg(struct phy_device *phydev) in at803x_prepare_config_aneg() argument
322 ret = at803x_config_mdix(phydev, phydev->mdix_ctrl); in at803x_prepare_config_aneg()
331 ret = genphy_soft_reset(phydev); in at803x_prepare_config_aneg()
340 int at803x_read_status(struct phy_device *phydev) in at803x_read_status() argument
343 int err, old_link = phydev->link; in at803x_read_status()
346 err = genphy_update_link(phydev); in at803x_read_status()
351 if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link) in at803x_read_status()
354 phydev->speed = SPEED_UNKNOWN; in at803x_read_status()
355 phydev->duplex = DUPLEX_UNKNOWN; in at803x_read_status()
356 phydev->pause = 0; in at803x_read_status()
357 phydev->asym_pause = 0; in at803x_read_status()
359 err = genphy_read_lpa(phydev); in at803x_read_status()
365 err = at803x_read_specific_status(phydev, ss_mask); in at803x_read_status()
369 if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) in at803x_read_status()
370 phy_resolve_aneg_pause(phydev); in at803x_read_status()
376 static int at803x_get_downshift(struct phy_device *phydev, u8 *d) in at803x_get_downshift() argument
380 val = phy_read(phydev, AT803X_SMART_SPEED); in at803x_get_downshift()
392 static int at803x_set_downshift(struct phy_device *phydev, u8 cnt) in at803x_set_downshift() argument
416 ret = phy_modify_changed(phydev, AT803X_SMART_SPEED, mask, set); in at803x_set_downshift()
423 ret = phy_init_hw(phydev); in at803x_set_downshift()
428 int at803x_get_tunable(struct phy_device *phydev, in at803x_get_tunable() argument
433 return at803x_get_downshift(phydev, data); in at803x_get_tunable()
440 int at803x_set_tunable(struct phy_device *phydev, in at803x_set_tunable() argument
445 return at803x_set_downshift(phydev, *(const u8 *)data); in at803x_set_tunable()
473 int at803x_cdt_start(struct phy_device *phydev, u32 cdt_start) in at803x_cdt_start() argument
475 return phy_write(phydev, AT803X_CDT, cdt_start); in at803x_cdt_start()
479 int at803x_cdt_wait_for_completion(struct phy_device *phydev, in at803x_cdt_wait_for_completion() argument
485 ret = phy_read_poll_timeout(phydev, AT803X_CDT, val, in at803x_cdt_wait_for_completion()
538 static int qca808x_cdt_fault_length(struct phy_device *phydev, int pair, in qca808x_cdt_fault_length() argument
561 val = phy_read_mmd(phydev, MDIO_MMD_PCS, cdt_length_reg); in qca808x_cdt_fault_length()
573 static int qca808x_cable_test_get_pair_status(struct phy_device *phydev, u8 pair, in qca808x_cable_test_get_pair_status() argument
597 ethnl_cable_test_result(phydev, pair, result); in qca808x_cable_test_get_pair_status()
600 length = qca808x_cdt_fault_length(phydev, pair, result); in qca808x_cable_test_get_pair_status()
601 ethnl_cable_test_fault_length(phydev, pair, length); in qca808x_cable_test_get_pair_status()
607 int qca808x_cable_test_get_status(struct phy_device *phydev, bool *finished) in qca808x_cable_test_get_status() argument
615 ret = at803x_cdt_start(phydev, val); in qca808x_cable_test_get_status()
619 ret = at803x_cdt_wait_for_completion(phydev, QCA808X_CDT_ENABLE_TEST); in qca808x_cable_test_get_status()
623 val = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA808X_MMD3_CDT_STATUS); in qca808x_cable_test_get_status()
627 ret = qca808x_cable_test_get_pair_status(phydev, ETHTOOL_A_CABLE_PAIR_A, val); in qca808x_cable_test_get_status()
631 ret = qca808x_cable_test_get_pair_status(phydev, ETHTOOL_A_CABLE_PAIR_B, val); in qca808x_cable_test_get_status()
635 ret = qca808x_cable_test_get_pair_status(phydev, ETHTOOL_A_CABLE_PAIR_C, val); in qca808x_cable_test_get_status()
639 ret = qca808x_cable_test_get_pair_status(phydev, ETHTOOL_A_CABLE_PAIR_D, val); in qca808x_cable_test_get_status()
649 int qca808x_led_reg_hw_control_enable(struct phy_device *phydev, u16 reg) in qca808x_led_reg_hw_control_enable() argument
651 return phy_clear_bits_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_reg_hw_control_enable()
656 bool qca808x_led_reg_hw_control_status(struct phy_device *phydev, u16 reg) in qca808x_led_reg_hw_control_status() argument
660 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca808x_led_reg_hw_control_status()
665 int qca808x_led_reg_brightness_set(struct phy_device *phydev, in qca808x_led_reg_brightness_set() argument
668 return phy_modify_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_reg_brightness_set()
675 int qca808x_led_reg_blink_set(struct phy_device *phydev, u16 reg, in qca808x_led_reg_blink_set() argument
682 ret = phy_modify_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_LED_GLOBAL, in qca808x_led_reg_blink_set()
689 ret = phy_modify_mmd(phydev, MDIO_MMD_AN, reg, in qca808x_led_reg_blink_set()
708 int qcom_phy_counter_config(struct phy_device *phydev) in qcom_phy_counter_config() argument
710 return phy_set_bits_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_CTRL, in qcom_phy_counter_config()
716 int qcom_phy_update_stats(struct phy_device *phydev, in qcom_phy_update_stats() argument
723 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_PKT_15_0); in qcom_phy_update_stats()
729 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_PKT_31_16); in qcom_phy_update_stats()
737 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_RX_ERR_PKT); in qcom_phy_update_stats()
744 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_TX_PKT_15_0); in qcom_phy_update_stats()
750 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_TX_PKT_31_16); in qcom_phy_update_stats()
758 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_MMD7_CNT_TX_ERR_PKT); in qcom_phy_update_stats()