Lines Matching refs:rt2800_register_write

466 	rt2800_register_write(rt2x00dev, WLAN_FUN_CTRL, reg);  in rt2800_enable_wlan_rt3290()
488 rt2800_register_write(rt2x00dev, 0x58, 0x018); in rt2800_enable_wlan_rt3290()
490 rt2800_register_write(rt2x00dev, 0x58, 0x418); in rt2800_enable_wlan_rt3290()
492 rt2800_register_write(rt2x00dev, 0x58, 0x618); in rt2800_enable_wlan_rt3290()
503 rt2800_register_write(rt2x00dev, WLAN_FUN_CTRL, reg); in rt2800_enable_wlan_rt3290()
506 rt2800_register_write(rt2x00dev, WLAN_FUN_CTRL, reg); in rt2800_enable_wlan_rt3290()
508 rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, 0x7fffffff); in rt2800_enable_wlan_rt3290()
598 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); in rt2800_disable_wpdma()
730 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0x00000000); in rt2800_load_firmware()
746 rt2800_register_write(rt2x00dev, AUX_CTRL, reg); in rt2800_load_firmware()
748 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000002); in rt2800_load_firmware()
782 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0); in rt2800_load_firmware()
783 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); in rt2800_load_firmware()
785 rt2800_register_write(rt2x00dev, H2M_INT_SRC, 0); in rt2800_load_firmware()
1399 rt2800_register_write(rt2x00dev, BCN_OFFSET0, (u32) reg); in rt2800_update_beacons_setup()
1400 rt2800_register_write(rt2x00dev, BCN_OFFSET1, (u32) (reg >> 32)); in rt2800_update_beacons_setup()
1408 rt2800_register_write(rt2x00dev, MAC_BSSID_DW1, bssid_dw1); in rt2800_update_beacons_setup()
1427 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); in rt2800_write_beacon()
1459 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, orig_reg); in rt2800_write_beacon()
1477 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, orig_reg); in rt2800_write_beacon()
1502 rt2800_register_write(rt2x00dev, beacon_base + i, 0); in rt2800_clear_beacon_register()
1517 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); in rt2800_clear_beacon()
1532 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, orig_reg); in rt2800_clear_beacon()
1541 .write = rt2800_register_write,
1632 rt2800_register_write(led->rt2x00dev, LED_CFG, reg); in rt2800_brightness_set()
1691 rt2800_register_write(rt2x00dev, offset, 0); in rt2800_delete_wcid_attr()
1708 rt2800_register_write(rt2x00dev, offset, reg); in rt2800_config_wcid_attr_bssidx()
1735 rt2800_register_write(rt2x00dev, offset, reg); in rt2800_config_wcid_attr_cipher()
1743 rt2800_register_write(rt2x00dev, offset, reg); in rt2800_config_wcid_attr_cipher()
1800 rt2800_register_write(rt2x00dev, offset, reg); in rt2800_config_shared_key()
1865 rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg); in rt2800_set_max_psdu_len()
2007 rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg); in rt2800_config_filter()
2023 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); in rt2800_config_intf()
2034 rt2800_register_write(rt2x00dev, TBTT_SYNC_CFG, reg); in rt2800_config_intf()
2041 rt2800_register_write(rt2x00dev, TBTT_SYNC_CFG, reg); in rt2800_config_intf()
2158 rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg); in rt2800_config_ht_opmode()
2163 rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg); in rt2800_config_ht_opmode()
2168 rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg); in rt2800_config_ht_opmode()
2173 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg); in rt2800_config_ht_opmode()
2185 rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg); in rt2800_config_erp()
2192 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg); in rt2800_config_erp()
2196 rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE, in rt2800_config_erp()
2198 rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003); in rt2800_config_erp()
2205 rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg); in rt2800_config_erp()
2209 rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg); in rt2800_config_erp()
2216 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); in rt2800_config_erp()
2251 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0); in rt2800_wait_bbp_ready()
2252 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); in rt2800_wait_bbp_ready()
2280 rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); in rt2800_config_3572bt_ant()
2292 rt2800_register_write(rt2x00dev, LED_CFG, reg); in rt2800_config_3572bt_ant()
2310 rt2800_register_write(rt2x00dev, E2PROM_CSR, reg); in rt2800_set_ant_diversity()
2318 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg); in rt2800_set_ant_diversity()
2789 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg); in rt2800_config_channel_rf3052()
3500 rt2800_register_write(rt2x00dev, LDO_CFG0, reg); in rt2800_config_channel_rf55xx()
3972 rt2800_register_write(rt2x00dev, TX_ALC_CFG_0, reg); in rt2800_config_alc_rt6352()
3976 rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg); in rt2800_config_alc_rt6352()
3981 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0); in rt2800_config_alc_rt6352()
4005 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl); in rt2800_config_alc_rt6352()
4350 rt2800_register_write(rt2x00dev, TX_BAND_CFG, reg); in rt2800_config_channel()
4410 rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); in rt2800_config_channel()
4454 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg); in rt2800_config_channel()
5170 rt2800_register_write(rt2x00dev, TX_PWR_CFG_0, regs[TX_PWR_CFG_0_IDX]); in rt2800_config_txpower_rt3593()
5171 rt2800_register_write(rt2x00dev, TX_PWR_CFG_1, regs[TX_PWR_CFG_1_IDX]); in rt2800_config_txpower_rt3593()
5172 rt2800_register_write(rt2x00dev, TX_PWR_CFG_2, regs[TX_PWR_CFG_2_IDX]); in rt2800_config_txpower_rt3593()
5173 rt2800_register_write(rt2x00dev, TX_PWR_CFG_3, regs[TX_PWR_CFG_3_IDX]); in rt2800_config_txpower_rt3593()
5174 rt2800_register_write(rt2x00dev, TX_PWR_CFG_4, regs[TX_PWR_CFG_4_IDX]); in rt2800_config_txpower_rt3593()
5175 rt2800_register_write(rt2x00dev, TX_PWR_CFG_5, regs[TX_PWR_CFG_5_IDX]); in rt2800_config_txpower_rt3593()
5176 rt2800_register_write(rt2x00dev, TX_PWR_CFG_6, regs[TX_PWR_CFG_6_IDX]); in rt2800_config_txpower_rt3593()
5177 rt2800_register_write(rt2x00dev, TX_PWR_CFG_7, regs[TX_PWR_CFG_7_IDX]); in rt2800_config_txpower_rt3593()
5178 rt2800_register_write(rt2x00dev, TX_PWR_CFG_8, regs[TX_PWR_CFG_8_IDX]); in rt2800_config_txpower_rt3593()
5179 rt2800_register_write(rt2x00dev, TX_PWR_CFG_9, regs[TX_PWR_CFG_9_IDX]); in rt2800_config_txpower_rt3593()
5181 rt2800_register_write(rt2x00dev, TX_PWR_CFG_0_EXT, in rt2800_config_txpower_rt3593()
5183 rt2800_register_write(rt2x00dev, TX_PWR_CFG_1_EXT, in rt2800_config_txpower_rt3593()
5185 rt2800_register_write(rt2x00dev, TX_PWR_CFG_2_EXT, in rt2800_config_txpower_rt3593()
5187 rt2800_register_write(rt2x00dev, TX_PWR_CFG_3_EXT, in rt2800_config_txpower_rt3593()
5189 rt2800_register_write(rt2x00dev, TX_PWR_CFG_4_EXT, in rt2800_config_txpower_rt3593()
5275 rt2800_register_write(rt2x00dev, in rt2800_config_txpower_rt6352()
5281 rt2800_register_write(rt2x00dev, in rt2800_config_txpower_rt6352()
5307 rt2800_register_write(rt2x00dev, TX_PWR_CFG_7, pwreg); in rt2800_config_txpower_rt6352()
5314 rt2800_register_write(rt2x00dev, TX_PWR_CFG_8, pwreg); in rt2800_config_txpower_rt6352()
5321 rt2800_register_write(rt2x00dev, TX_PWR_CFG_9, pwreg); in rt2800_config_txpower_rt6352()
5513 rt2800_register_write(rt2x00dev, offset, reg); in rt2800_config_txpower_rt28xx()
5556 rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); in rt2800_vco_calibration()
5631 rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); in rt2800_vco_calibration()
5645 rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg); in rt2800_config_retry_limit()
5657 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0); in rt2800_config_ps()
5664 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg); in rt2800_config_ps()
5672 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg); in rt2800_config_ps()
5851 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x01); in rt2800_init_registers()
5860 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00); in rt2800_init_registers()
5863 rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f); in rt2800_init_registers()
5864 rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003); in rt2800_init_registers()
5866 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000); in rt2800_init_registers()
5875 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); in rt2800_init_registers()
5882 rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg); in rt2800_init_registers()
5888 rt2800_register_write(rt2x00dev, WLAN_FUN_CTRL, reg); in rt2800_init_registers()
5895 rt2800_register_write(rt2x00dev, CMB_CTRL, reg); in rt2800_init_registers()
5902 rt2800_register_write(rt2x00dev, OSC_CTRL, reg); in rt2800_init_registers()
5906 rt2800_register_write(rt2x00dev, COEX_CFG0, reg); in rt2800_init_registers()
5913 rt2800_register_write(rt2x00dev, COEX_CFG2, reg); in rt2800_init_registers()
5917 rt2800_register_write(rt2x00dev, PLL_CTRL, reg); in rt2800_init_registers()
5926 rt2800_register_write(rt2x00dev, TX_SW_CFG0, in rt2800_init_registers()
5929 rt2800_register_write(rt2x00dev, TX_SW_CFG0, in rt2800_init_registers()
5932 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); in rt2800_init_registers()
5938 rt2800_register_write(rt2x00dev, TX_SW_CFG2, in rt2800_init_registers()
5941 rt2800_register_write(rt2x00dev, TX_SW_CFG2, in rt2800_init_registers()
5944 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); in rt2800_init_registers()
5947 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); in rt2800_init_registers()
5950 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); in rt2800_init_registers()
5951 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x0000002c); in rt2800_init_registers()
5953 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); in rt2800_init_registers()
5954 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); in rt2800_init_registers()
5957 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); in rt2800_init_registers()
5958 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); in rt2800_init_registers()
5959 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000030); in rt2800_init_registers()
5961 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000402); in rt2800_init_registers()
5962 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); in rt2800_init_registers()
5963 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); in rt2800_init_registers()
5965 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); in rt2800_init_registers()
5966 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); in rt2800_init_registers()
5968 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000402); in rt2800_init_registers()
5969 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); in rt2800_init_registers()
5974 rt2800_register_write(rt2x00dev, TX_SW_CFG2, in rt2800_init_registers()
5977 rt2800_register_write(rt2x00dev, TX_SW_CFG2, in rt2800_init_registers()
5980 rt2800_register_write(rt2x00dev, TX_SW_CFG2, in rt2800_init_registers()
5984 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000402); in rt2800_init_registers()
5985 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); in rt2800_init_registers()
5986 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00040000); in rt2800_init_registers()
5987 rt2800_register_write(rt2x00dev, TX_TXBF_CFG_0, 0x8000fc21); in rt2800_init_registers()
5988 rt2800_register_write(rt2x00dev, TX_TXBF_CFG_3, 0x00009c40); in rt2800_init_registers()
5991 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); in rt2800_init_registers()
5992 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); in rt2800_init_registers()
5993 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); in rt2800_init_registers()
5995 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); in rt2800_init_registers()
5996 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); in rt2800_init_registers()
5997 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); in rt2800_init_registers()
5999 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); in rt2800_init_registers()
6001 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401); in rt2800_init_registers()
6002 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001); in rt2800_init_registers()
6003 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); in rt2800_init_registers()
6004 rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000); in rt2800_init_registers()
6005 rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0); in rt2800_init_registers()
6006 rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0); in rt2800_init_registers()
6007 rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C666C); in rt2800_init_registers()
6008 rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C666C); in rt2800_init_registers()
6009 rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, in rt2800_init_registers()
6011 rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT, in rt2800_init_registers()
6015 rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg); in rt2800_init_registers()
6017 rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_20M1S, 0x77754433); in rt2800_init_registers()
6018 rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_20M2S, 0x77765543); in rt2800_init_registers()
6019 rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_40M1S, 0x77765544); in rt2800_init_registers()
6020 rt2800_register_write(rt2x00dev, AMPDU_MAX_LEN_40M2S, 0x77765544); in rt2800_init_registers()
6022 rt2800_register_write(rt2x00dev, HT_FBK_TO_LEGACY, 0x1010); in rt2800_init_registers()
6025 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000); in rt2800_init_registers()
6026 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); in rt2800_init_registers()
6038 rt2800_register_write(rt2x00dev, TX_LINK_CFG, reg); in rt2800_init_registers()
6044 rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg); in rt2800_init_registers()
6060 rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg); in rt2800_init_registers()
6070 rt2800_register_write(rt2x00dev, LED_CFG, reg); in rt2800_init_registers()
6072 rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f); in rt2800_init_registers()
6081 rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg); in rt2800_init_registers()
6091 rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg); in rt2800_init_registers()
6104 rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg); in rt2800_init_registers()
6117 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg); in rt2800_init_registers()
6130 rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg); in rt2800_init_registers()
6143 rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg); in rt2800_init_registers()
6156 rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg); in rt2800_init_registers()
6169 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg); in rt2800_init_registers()
6172 rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006); in rt2800_init_registers()
6184 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); in rt2800_init_registers()
6202 rt2800_register_write(rt2x00dev, TXOP_CTRL_CFG, reg); in rt2800_init_registers()
6205 rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, reg); in rt2800_init_registers()
6208 rt2800_register_write(rt2x00dev, TX_FBK_CFG_3S_0, 0x12111008); in rt2800_init_registers()
6209 rt2800_register_write(rt2x00dev, TX_FBK_CFG_3S_1, 0x16151413); in rt2800_init_registers()
6217 rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg); in rt2800_init_registers()
6219 rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca); in rt2800_init_registers()
6234 rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg); in rt2800_init_registers()
6236 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003); in rt2800_init_registers()
6242 rt2800_register_write(rt2x00dev, SHARED_KEY_MODE_ENTRY(i), 0); in rt2800_init_registers()
6256 rt2800_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0); in rt2800_init_registers()
6267 rt2800_register_write(rt2x00dev, US_CYC_CNT, reg); in rt2800_init_registers()
6271 rt2800_register_write(rt2x00dev, US_CYC_CNT, reg); in rt2800_init_registers()
6292 rt2800_register_write(rt2x00dev, US_CYC_CNT, reg); in rt2800_init_registers()
6304 rt2800_register_write(rt2x00dev, HT_FBK_CFG0, reg); in rt2800_init_registers()
6315 rt2800_register_write(rt2x00dev, HT_FBK_CFG1, reg); in rt2800_init_registers()
6326 rt2800_register_write(rt2x00dev, LG_FBK_CFG0, reg); in rt2800_init_registers()
6333 rt2800_register_write(rt2x00dev, LG_FBK_CFG1, reg); in rt2800_init_registers()
6341 rt2800_register_write(rt2x00dev, AMPDU_BA_WINSIZE, reg); in rt2800_init_registers()
6360 rt2800_register_write(rt2x00dev, INT_TIMER_CFG, reg); in rt2800_init_registers()
6371 rt2800_register_write(rt2x00dev, CH_TIME_CFG, reg); in rt2800_init_registers()
6945 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg); in rt2800_init_bbp_53xx()
7316 rt2800_register_write(rt2x00dev, OPT_14_CSR, reg); in rt2800_led_open_drain_enable()
7650 rt2800_register_write(rt2x00dev, LDO_CFG0, reg); in rt2800_init_rfcsr_30xx()
7669 rt2800_register_write(rt2x00dev, LDO_CFG0, reg); in rt2800_init_rfcsr_30xx()
7673 rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); in rt2800_init_rfcsr_30xx()
7888 rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); in rt2800_init_rfcsr_3390()
7945 rt2800_register_write(rt2x00dev, LDO_CFG0, reg); in rt2800_init_rfcsr_3572()
7950 rt2800_register_write(rt2x00dev, LDO_CFG0, reg); in rt2800_init_rfcsr_3572()
8014 rt2800_register_write(rt2x00dev, GPIO_SWITCH, reg); in rt2800_init_rfcsr_3593()
8065 rt2800_register_write(rt2x00dev, LDO_CFG0, reg); in rt2800_init_rfcsr_3593()
8069 rt2800_register_write(rt2x00dev, LDO_CFG0, reg); in rt2800_init_rfcsr_3593()
8515 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x0); in rt2800_rf_self_txdc_cal()
8516 rt2800_register_write(rt2x00dev, RF_BYPASS2, 0x0); in rt2800_rf_self_txdc_cal()
8518 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0xC); in rt2800_rf_self_txdc_cal()
8519 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x3306); in rt2800_rf_self_txdc_cal()
8520 rt2800_register_write(rt2x00dev, RF_CONTROL2, 0x3330); in rt2800_rf_self_txdc_cal()
8521 rt2800_register_write(rt2x00dev, RF_BYPASS2, 0xfffff); in rt2800_rf_self_txdc_cal()
8543 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x0); in rt2800_rf_self_txdc_cal()
8544 rt2800_register_write(rt2x00dev, RF_BYPASS2, 0x0); in rt2800_rf_self_txdc_cal()
8545 rt2800_register_write(rt2x00dev, RF_CONTROL0, mac0518); in rt2800_rf_self_txdc_cal()
8546 rt2800_register_write(rt2x00dev, RF_BYPASS0, mac051c); in rt2800_rf_self_txdc_cal()
8547 rt2800_register_write(rt2x00dev, RF_CONTROL2, mac0528); in rt2800_rf_self_txdc_cal()
8548 rt2800_register_write(rt2x00dev, RF_BYPASS2, mac052c); in rt2800_rf_self_txdc_cal()
8597 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg); in rt2800_r_calibration()
8604 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg); in rt2800_r_calibration()
8610 rt2800_register_write(rt2x00dev, RF_BYPASS0, rfvalue); in rt2800_r_calibration()
8612 rt2800_register_write(rt2x00dev, RF_CONTROL0, rfvalue); in rt2800_r_calibration()
8624 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x1); in rt2800_r_calibration()
8676 rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0); in rt2800_r_calibration()
8677 rt2800_register_write(rt2x00dev, RF_CONTROL0, MAC_RF_CONTROL0); in rt2800_r_calibration()
8679 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl); in rt2800_r_calibration()
8680 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, MAC_PWR_PIN_CFG); in rt2800_r_calibration()
8701 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x8); in rt2800_rxdcoc_calibration()
8732 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, macvalue); in rt2800_rxdcoc_calibration()
8798 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x0); in rt2800_rxiq_calibration()
8813 rt2800_register_write(rt2x00dev, RF_CONTROL1, 0x00000202); in rt2800_rxiq_calibration()
8814 rt2800_register_write(rt2x00dev, RF_BYPASS1, 0x00000303); in rt2800_rxiq_calibration()
8816 rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x0101); in rt2800_rxiq_calibration()
8818 rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x0000); in rt2800_rxiq_calibration()
8820 rt2800_register_write(rt2x00dev, RF_BYPASS3, 0xf1f1); in rt2800_rxiq_calibration()
8868 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00000004); in rt2800_rxiq_calibration()
8870 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00000006); in rt2800_rxiq_calibration()
8872 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x00003376); in rt2800_rxiq_calibration()
8873 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001006); in rt2800_rxiq_calibration()
8892 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001006); in rt2800_rxiq_calibration()
8908 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00002006); in rt2800_rxiq_calibration()
9094 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00000006); in rt2800_rxiq_calibration()
9096 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00000004); in rt2800_rxiq_calibration()
9098 rt2800_register_write(rt2x00dev, RF_CONTROL0, orig_RF_CONTROL0); in rt2800_rxiq_calibration()
9100 rt2800_register_write(rt2x00dev, RF_BYPASS0, orig_RF_BYPASS0); in rt2800_rxiq_calibration()
9101 rt2800_register_write(rt2x00dev, RF_CONTROL1, orig_RF_CONTROL1); in rt2800_rxiq_calibration()
9102 rt2800_register_write(rt2x00dev, RF_BYPASS1, orig_RF_BYPASS1); in rt2800_rxiq_calibration()
9103 rt2800_register_write(rt2x00dev, RF_CONTROL3, orig_RF_CONTROL3); in rt2800_rxiq_calibration()
9104 rt2800_register_write(rt2x00dev, RF_BYPASS3, orig_RF_BYPASS3); in rt2800_rxiq_calibration()
9105 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl); in rt2800_rxiq_calibration()
9619 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, macvalue); in rt2800_loft_iq_calibration()
9626 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, macvalue); in rt2800_loft_iq_calibration()
9650 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00); in rt2800_loft_iq_calibration()
9651 rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x0000000F); in rt2800_loft_iq_calibration()
9652 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00000004); in rt2800_loft_iq_calibration()
9653 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x00003306); in rt2800_loft_iq_calibration()
9654 rt2800_register_write(rt2x00dev, 0x13b8, 0x10); in rt2800_loft_iq_calibration()
9665 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001004); in rt2800_loft_iq_calibration()
9667 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00002004); in rt2800_loft_iq_calibration()
9687 rt2800_register_write(rt2x00dev, RF_CONTROL3, macvalue); in rt2800_loft_iq_calibration()
9689 rt2800_register_write(rt2x00dev, RF_BYPASS3, macvalue); in rt2800_loft_iq_calibration()
9760 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x04); in rt2800_loft_iq_calibration()
9774 rt2800_register_write(rt2x00dev, TX_PIN_CFG, macorg1); in rt2800_loft_iq_calibration()
9775 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x04); in rt2800_loft_iq_calibration()
9776 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00); in rt2800_loft_iq_calibration()
9777 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x00); in rt2800_loft_iq_calibration()
9778 rt2800_register_write(rt2x00dev, RF_CONTROL0, macorg2); in rt2800_loft_iq_calibration()
9780 rt2800_register_write(rt2x00dev, RF_BYPASS0, macorg3); in rt2800_loft_iq_calibration()
9781 rt2800_register_write(rt2x00dev, RF_CONTROL3, macorg4); in rt2800_loft_iq_calibration()
9782 rt2800_register_write(rt2x00dev, RF_BYPASS3, macorg5); in rt2800_loft_iq_calibration()
9783 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl); in rt2800_loft_iq_calibration()
9784 rt2800_register_write(rt2x00dev, RF_CONTROL2, orig528); in rt2800_loft_iq_calibration()
9785 rt2800_register_write(rt2x00dev, RF_BYPASS2, orig52c); in rt2800_loft_iq_calibration()
9786 rt2800_register_write(rt2x00dev, 0x13b8, mac13b8); in rt2800_loft_iq_calibration()
9803 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, macvalue); in rt2800_loft_iq_calibration()
9810 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, macvalue); in rt2800_loft_iq_calibration()
9816 rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x00000101); in rt2800_loft_iq_calibration()
9817 rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0000F1F1); in rt2800_loft_iq_calibration()
9836 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00000004); in rt2800_loft_iq_calibration()
9837 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x00003306); in rt2800_loft_iq_calibration()
9840 rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x0000000F); in rt2800_loft_iq_calibration()
9843 rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x00000000); in rt2800_loft_iq_calibration()
9844 rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0000F1F1); in rt2800_loft_iq_calibration()
9847 rt2800_register_write(rt2x00dev, 0x13b8, 0x00000010); in rt2800_loft_iq_calibration()
9873 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00001004); in rt2800_loft_iq_calibration()
9883 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00002004); in rt2800_loft_iq_calibration()
9951 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x04); in rt2800_loft_iq_calibration()
9994 rt2800_register_write(rt2x00dev, TX_PIN_CFG, macorg1); in rt2800_loft_iq_calibration()
9995 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x00); in rt2800_loft_iq_calibration()
9996 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x00); in rt2800_loft_iq_calibration()
9997 rt2800_register_write(rt2x00dev, RF_CONTROL0, macorg2); in rt2800_loft_iq_calibration()
9999 rt2800_register_write(rt2x00dev, RF_BYPASS0, macorg3); in rt2800_loft_iq_calibration()
10000 rt2800_register_write(rt2x00dev, RF_CONTROL3, macorg4); in rt2800_loft_iq_calibration()
10001 rt2800_register_write(rt2x00dev, RF_BYPASS3, macorg5); in rt2800_loft_iq_calibration()
10002 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl); in rt2800_loft_iq_calibration()
10003 rt2800_register_write(rt2x00dev, 0x13b8, mac13b8); in rt2800_loft_iq_calibration()
10034 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x04); in rt2800_rf_lp_config()
10036 rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x02); in rt2800_rf_lp_config()
10038 rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x06); in rt2800_rf_lp_config()
10345 rt2800_register_write(rt2x00dev, RF_CONTROL0, MAC_RF_CONTROL0); in rt2800_bw_filter_calibration()
10346 rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0); in rt2800_bw_filter_calibration()
10352 rt2800_register_write(rt2x00dev, RF_CONTROL3, 0x0); in rt2800_restore_rf_bbp_rt6352()
10353 rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0); in rt2800_restore_rf_bbp_rt6352()
10389 rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x3630363a); in rt2800_restore_rf_bbp_rt6352()
10390 rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6c6c666c); in rt2800_restore_rf_bbp_rt6352()
10391 rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6c6c666c); in rt2800_restore_rf_bbp_rt6352()
10422 rt2800_register_write(rt2x00dev, RF_CONTROL3, reg); in rt2800_calibration_rt6352()
10426 rt2800_register_write(rt2x00dev, RF_BYPASS3, reg); in rt2800_calibration_rt6352()
10465 rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, 0x36303636); in rt2800_calibration_rt6352()
10466 rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6c6c6b6c); in rt2800_calibration_rt6352()
10467 rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6c6c6b6c); in rt2800_calibration_rt6352()
10809 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0); in rt2800_enable_radio()
10810 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); in rt2800_enable_radio()
10812 rt2800_register_write(rt2x00dev, H2M_INT_SRC, 0); in rt2800_enable_radio()
10843 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); in rt2800_enable_radio()
10851 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); in rt2800_enable_radio()
10856 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); in rt2800_enable_radio()
10889 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); in rt2800_disable_radio()
12027 rt2800_register_write(rt2x00dev, GPIO_CTRL, reg); in rt2800_probe_hw()
12111 rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg); in rt2800_set_rts_threshold()
12115 rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg); in rt2800_set_rts_threshold()
12119 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg); in rt2800_set_rts_threshold()
12123 rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg); in rt2800_set_rts_threshold()
12127 rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg); in rt2800_set_rts_threshold()
12131 rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg); in rt2800_set_rts_threshold()
12135 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg); in rt2800_set_rts_threshold()
12179 rt2800_register_write(rt2x00dev, offset, reg); in rt2800_conf_tx()
12187 rt2800_register_write(rt2x00dev, WMM_AIFSN_CFG, reg); in rt2800_conf_tx()
12191 rt2800_register_write(rt2x00dev, WMM_CWMIN_CFG, reg); in rt2800_conf_tx()
12195 rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg); in rt2800_conf_tx()
12205 rt2800_register_write(rt2x00dev, offset, reg); in rt2800_conf_tx()