Lines Matching refs:cpu_pmu
444 static irqreturn_t m1_pmu_handle_irq(struct arm_pmu *cpu_pmu) in m1_pmu_handle_irq() argument
446 struct pmu_hw_events *cpuc = this_cpu_ptr(cpu_pmu->hw_events); in m1_pmu_handle_irq()
461 cpu_pmu->stop(cpu_pmu); in m1_pmu_handle_irq()
465 for_each_set_bit(idx, cpu_pmu->cntr_mask, M1_PMU_NR_COUNTERS) { in m1_pmu_handle_irq()
480 cpu_pmu->start(cpu_pmu); in m1_pmu_handle_irq()
536 static void m1_pmu_start(struct arm_pmu *cpu_pmu) in m1_pmu_start() argument
541 static void m1_pmu_stop(struct arm_pmu *cpu_pmu) in m1_pmu_stop() argument
626 static int m1_pmu_init(struct arm_pmu *cpu_pmu, u32 flags) in m1_pmu_init() argument
628 cpu_pmu->handle_irq = m1_pmu_handle_irq; in m1_pmu_init()
629 cpu_pmu->enable = m1_pmu_enable_event; in m1_pmu_init()
630 cpu_pmu->disable = m1_pmu_disable_event; in m1_pmu_init()
631 cpu_pmu->read_counter = m1_pmu_read_counter; in m1_pmu_init()
632 cpu_pmu->write_counter = m1_pmu_write_counter; in m1_pmu_init()
633 cpu_pmu->get_event_idx = m1_pmu_get_event_idx; in m1_pmu_init()
634 cpu_pmu->clear_event_idx = m1_pmu_clear_event_idx; in m1_pmu_init()
635 cpu_pmu->start = m1_pmu_start; in m1_pmu_init()
636 cpu_pmu->stop = m1_pmu_stop; in m1_pmu_init()
639 cpu_pmu->map_event = m1_pmu_map_event; in m1_pmu_init()
641 cpu_pmu->map_event = m2_pmu_map_event; in m1_pmu_init()
645 cpu_pmu->reset = m1_pmu_reset; in m1_pmu_init()
646 cpu_pmu->set_event_filter = m1_pmu_set_event_filter; in m1_pmu_init()
648 cpu_pmu->map_pmuv3_event = m1_pmu_map_pmuv3_event; in m1_pmu_init()
649 m1_pmu_init_pmceid(cpu_pmu); in m1_pmu_init()
651 bitmap_set(cpu_pmu->cntr_mask, 0, M1_PMU_NR_COUNTERS); in m1_pmu_init()
652 cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_EVENTS] = &m1_pmu_events_attr_group; in m1_pmu_init()
653 cpu_pmu->attr_groups[ARMPMU_ATTR_GROUP_FORMATS] = &m1_pmu_format_attr_group; in m1_pmu_init()
658 static int m1_pmu_ice_init(struct arm_pmu *cpu_pmu) in m1_pmu_ice_init() argument
660 cpu_pmu->name = "apple_icestorm_pmu"; in m1_pmu_ice_init()
661 return m1_pmu_init(cpu_pmu, ARMPMU_EVT_47BIT); in m1_pmu_ice_init()
664 static int m1_pmu_fire_init(struct arm_pmu *cpu_pmu) in m1_pmu_fire_init() argument
666 cpu_pmu->name = "apple_firestorm_pmu"; in m1_pmu_fire_init()
667 return m1_pmu_init(cpu_pmu, ARMPMU_EVT_47BIT); in m1_pmu_fire_init()
670 static int m2_pmu_avalanche_init(struct arm_pmu *cpu_pmu) in m2_pmu_avalanche_init() argument
672 cpu_pmu->name = "apple_avalanche_pmu"; in m2_pmu_avalanche_init()
673 return m1_pmu_init(cpu_pmu, ARMPMU_EVT_63BIT); in m2_pmu_avalanche_init()
676 static int m2_pmu_blizzard_init(struct arm_pmu *cpu_pmu) in m2_pmu_blizzard_init() argument
678 cpu_pmu->name = "apple_blizzard_pmu"; in m2_pmu_blizzard_init()
679 return m1_pmu_init(cpu_pmu, ARMPMU_EVT_63BIT); in m2_pmu_blizzard_init()