Lines Matching refs:qphy
530 static void qusb2_phy_override_phy_params(struct qusb2_phy *qphy) in qusb2_phy_override_phy_params() argument
532 const struct qusb2_phy_cfg *cfg = qphy->cfg; in qusb2_phy_override_phy_params()
533 struct override_params *or = &qphy->overrides; in qusb2_phy_override_phy_params()
536 qusb2_write_mask(qphy->base, QUSB2PHY_IMP_CTRL1, in qusb2_phy_override_phy_params()
541 qusb2_write_mask(qphy->base, QUSB2PHY_PLL_BIAS_CONTROL_2, in qusb2_phy_override_phy_params()
546 qusb2_write_mask(qphy->base, QUSB2PHY_CHG_CTRL2, in qusb2_phy_override_phy_params()
551 qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], in qusb2_phy_override_phy_params()
556 qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], in qusb2_phy_override_phy_params()
563 qusb2_setbits(qphy->base, in qusb2_phy_override_phy_params()
567 qusb2_clrbits(qphy->base, in qusb2_phy_override_phy_params()
573 qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE2], in qusb2_phy_override_phy_params()
583 static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy) in qusb2_phy_set_tune2_param() argument
585 struct device *dev = &qphy->phy->dev; in qusb2_phy_set_tune2_param()
586 const struct qusb2_phy_cfg *cfg = qphy->cfg; in qusb2_phy_set_tune2_param()
590 if (!qphy->cell) in qusb2_phy_set_tune2_param()
600 val = nvmem_cell_read(qphy->cell, NULL); in qusb2_phy_set_tune2_param()
614 qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1], in qusb2_phy_set_tune2_param()
617 qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE2], in qusb2_phy_set_tune2_param()
624 struct qusb2_phy *qphy = phy_get_drvdata(phy); in qusb2_phy_set_mode() local
626 qphy->mode = mode; in qusb2_phy_set_mode()
633 struct qusb2_phy *qphy = dev_get_drvdata(dev); in qusb2_phy_runtime_suspend() local
634 const struct qusb2_phy_cfg *cfg = qphy->cfg; in qusb2_phy_runtime_suspend()
637 dev_vdbg(dev, "Suspending QUSB2 Phy, mode:%d\n", qphy->mode); in qusb2_phy_runtime_suspend()
639 if (!qphy->phy_initialized) { in qusb2_phy_runtime_suspend()
651 switch (qphy->mode) { in qusb2_phy_runtime_suspend()
669 writel(intr_mask, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]); in qusb2_phy_runtime_suspend()
673 qusb2_setbits(qphy->base, in qusb2_phy_runtime_suspend()
680 if (qphy->mode != PHY_MODE_INVALID) { in qusb2_phy_runtime_suspend()
681 qusb2_setbits(qphy->base, cfg->regs[QUSB2PHY_PORT_TEST1], in qusb2_phy_runtime_suspend()
684 qusb2_clrbits(qphy->base, cfg->regs[QUSB2PHY_PORT_TEST1], in qusb2_phy_runtime_suspend()
688 if (!qphy->has_se_clk_scheme) in qusb2_phy_runtime_suspend()
689 clk_disable_unprepare(qphy->ref_clk); in qusb2_phy_runtime_suspend()
691 clk_disable_unprepare(qphy->cfg_ahb_clk); in qusb2_phy_runtime_suspend()
692 clk_disable_unprepare(qphy->iface_clk); in qusb2_phy_runtime_suspend()
699 struct qusb2_phy *qphy = dev_get_drvdata(dev); in qusb2_phy_runtime_resume() local
700 const struct qusb2_phy_cfg *cfg = qphy->cfg; in qusb2_phy_runtime_resume()
703 dev_vdbg(dev, "Resuming QUSB2 phy, mode:%d\n", qphy->mode); in qusb2_phy_runtime_resume()
705 if (!qphy->phy_initialized) { in qusb2_phy_runtime_resume()
710 ret = clk_prepare_enable(qphy->iface_clk); in qusb2_phy_runtime_resume()
716 ret = clk_prepare_enable(qphy->cfg_ahb_clk); in qusb2_phy_runtime_resume()
722 if (!qphy->has_se_clk_scheme) { in qusb2_phy_runtime_resume()
723 ret = clk_prepare_enable(qphy->ref_clk); in qusb2_phy_runtime_resume()
730 writel(0x0, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]); in qusb2_phy_runtime_resume()
734 qusb2_clrbits(qphy->base, in qusb2_phy_runtime_resume()
742 clk_disable_unprepare(qphy->cfg_ahb_clk); in qusb2_phy_runtime_resume()
744 clk_disable_unprepare(qphy->iface_clk); in qusb2_phy_runtime_resume()
751 struct qusb2_phy *qphy = phy_get_drvdata(phy); in qusb2_phy_init() local
752 const struct qusb2_phy_cfg *cfg = qphy->cfg; in qusb2_phy_init()
760 ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qusb2_phy_init()
764 ret = clk_prepare_enable(qphy->iface_clk); in qusb2_phy_init()
771 ret = clk_prepare_enable(qphy->cfg_ahb_clk); in qusb2_phy_init()
778 ret = reset_control_assert(qphy->phy_reset); in qusb2_phy_init()
787 ret = reset_control_deassert(qphy->phy_reset); in qusb2_phy_init()
794 qusb2_setbits(qphy->base, cfg->regs[QUSB2PHY_PORT_POWERDOWN], in qusb2_phy_init()
795 qphy->cfg->disable_ctrl); in qusb2_phy_init()
799 val = readl(qphy->base + QUSB2PHY_PLL_TEST); in qusb2_phy_init()
802 qcom_qusb2_phy_configure(qphy->base, cfg->regs, cfg->tbl, in qusb2_phy_init()
806 qusb2_phy_override_phy_params(qphy); in qusb2_phy_init()
809 qusb2_phy_set_tune2_param(qphy); in qusb2_phy_init()
812 qusb2_clrbits(qphy->base, cfg->regs[QUSB2PHY_PORT_POWERDOWN], in qusb2_phy_init()
823 qphy->has_se_clk_scheme = cfg->se_clk_scheme_default; in qusb2_phy_init()
831 if (qphy->tcsr) { in qusb2_phy_init()
832 ret = regmap_read(qphy->tcsr, qphy->cfg->clk_scheme_offset, in qusb2_phy_init()
843 qphy->has_se_clk_scheme = false; in qusb2_phy_init()
850 if (!qphy->has_se_clk_scheme) { in qusb2_phy_init()
851 ret = clk_prepare_enable(qphy->ref_clk); in qusb2_phy_init()
860 if (!qphy->has_se_clk_scheme) in qusb2_phy_init()
865 writel(val, qphy->base + QUSB2PHY_PLL_TEST); in qusb2_phy_init()
868 readl(qphy->base + QUSB2PHY_PLL_TEST); in qusb2_phy_init()
874 val = readb(qphy->base + cfg->regs[QUSB2PHY_PLL_STATUS]); in qusb2_phy_init()
881 qphy->phy_initialized = true; in qusb2_phy_init()
886 if (!qphy->has_se_clk_scheme) in qusb2_phy_init()
887 clk_disable_unprepare(qphy->ref_clk); in qusb2_phy_init()
889 reset_control_assert(qphy->phy_reset); in qusb2_phy_init()
891 clk_disable_unprepare(qphy->cfg_ahb_clk); in qusb2_phy_init()
893 clk_disable_unprepare(qphy->iface_clk); in qusb2_phy_init()
895 regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qusb2_phy_init()
902 struct qusb2_phy *qphy = phy_get_drvdata(phy); in qusb2_phy_exit() local
905 qusb2_setbits(qphy->base, qphy->cfg->regs[QUSB2PHY_PORT_POWERDOWN], in qusb2_phy_exit()
906 qphy->cfg->disable_ctrl); in qusb2_phy_exit()
908 if (!qphy->has_se_clk_scheme) in qusb2_phy_exit()
909 clk_disable_unprepare(qphy->ref_clk); in qusb2_phy_exit()
911 reset_control_assert(qphy->phy_reset); in qusb2_phy_exit()
913 clk_disable_unprepare(qphy->cfg_ahb_clk); in qusb2_phy_exit()
914 clk_disable_unprepare(qphy->iface_clk); in qusb2_phy_exit()
916 regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qusb2_phy_exit()
918 qphy->phy_initialized = false; in qusb2_phy_exit()
990 struct qusb2_phy *qphy; in qusb2_phy_probe() local
998 qphy = devm_kzalloc(dev, sizeof(*qphy), GFP_KERNEL); in qusb2_phy_probe()
999 if (!qphy) in qusb2_phy_probe()
1001 or = &qphy->overrides; in qusb2_phy_probe()
1003 qphy->base = devm_platform_ioremap_resource(pdev, 0); in qusb2_phy_probe()
1004 if (IS_ERR(qphy->base)) in qusb2_phy_probe()
1005 return PTR_ERR(qphy->base); in qusb2_phy_probe()
1007 qphy->cfg_ahb_clk = devm_clk_get(dev, "cfg_ahb"); in qusb2_phy_probe()
1008 if (IS_ERR(qphy->cfg_ahb_clk)) in qusb2_phy_probe()
1009 return dev_err_probe(dev, PTR_ERR(qphy->cfg_ahb_clk), in qusb2_phy_probe()
1012 qphy->ref_clk = devm_clk_get(dev, "ref"); in qusb2_phy_probe()
1013 if (IS_ERR(qphy->ref_clk)) in qusb2_phy_probe()
1014 return dev_err_probe(dev, PTR_ERR(qphy->ref_clk), in qusb2_phy_probe()
1017 qphy->iface_clk = devm_clk_get_optional(dev, "iface"); in qusb2_phy_probe()
1018 if (IS_ERR(qphy->iface_clk)) in qusb2_phy_probe()
1019 return PTR_ERR(qphy->iface_clk); in qusb2_phy_probe()
1021 qphy->phy_reset = devm_reset_control_get_by_index(&pdev->dev, 0); in qusb2_phy_probe()
1022 if (IS_ERR(qphy->phy_reset)) { in qusb2_phy_probe()
1024 return PTR_ERR(qphy->phy_reset); in qusb2_phy_probe()
1027 num = ARRAY_SIZE(qphy->vregs); in qusb2_phy_probe()
1029 qphy->vregs[i].supply = qusb2_phy_vreg_names[i]; in qusb2_phy_probe()
1031 ret = devm_regulator_bulk_get(dev, num, qphy->vregs); in qusb2_phy_probe()
1037 qphy->cfg = of_device_get_match_data(dev); in qusb2_phy_probe()
1039 qphy->tcsr = syscon_regmap_lookup_by_phandle(dev->of_node, in qusb2_phy_probe()
1041 if (IS_ERR(qphy->tcsr)) { in qusb2_phy_probe()
1043 qphy->tcsr = NULL; in qusb2_phy_probe()
1046 qphy->cell = devm_nvmem_cell_get(dev, NULL); in qusb2_phy_probe()
1047 if (IS_ERR(qphy->cell)) { in qusb2_phy_probe()
1048 if (PTR_ERR(qphy->cell) == -EPROBE_DEFER) in qusb2_phy_probe()
1050 qphy->cell = NULL; in qusb2_phy_probe()
1111 qphy->phy = generic_phy; in qusb2_phy_probe()
1113 dev_set_drvdata(dev, qphy); in qusb2_phy_probe()
1114 phy_set_drvdata(generic_phy, qphy); in qusb2_phy_probe()