Lines Matching refs:rtc_base
59 void __iomem *rtc_base; member
84 status = readl(priv->rtc_base + RTCS_OFFSET); in s32g_rtc_handler()
87 writel(0x0, priv->rtc_base + APIVAL_OFFSET); in s32g_rtc_handler()
88 writel(status | RTCS_APIF, priv->rtc_base + RTCS_OFFSET); in s32g_rtc_handler()
120 rtcc = readl(priv->rtc_base + RTCC_OFFSET); in s32g_rtc_read_alarm()
121 rtcs = readl(priv->rtc_base + RTCS_OFFSET); in s32g_rtc_read_alarm()
138 rtcc = readl(priv->rtc_base + RTCC_OFFSET); in s32g_rtc_alarm_irq_enable()
140 writel(rtcc, priv->rtc_base + RTCC_OFFSET); in s32g_rtc_alarm_irq_enable()
167 0, RTC_SYNCH_TIMEOUT, false, priv->rtc_base + RTCS_OFFSET); in s32g_rtc_set_alarm()
171 writel(cycles, priv->rtc_base + APIVAL_OFFSET); in s32g_rtc_set_alarm()
174 0, RTC_SYNCH_TIMEOUT, false, priv->rtc_base + RTCS_OFFSET); in s32g_rtc_set_alarm()
184 u32 rtcc = readl(priv->rtc_base + RTCC_OFFSET); in s32g_rtc_disable()
187 writel(rtcc, priv->rtc_base + RTCC_OFFSET); in s32g_rtc_disable()
192 u32 rtcc = readl(priv->rtc_base + RTCC_OFFSET); in s32g_rtc_enable()
195 writel(rtcc, priv->rtc_base + RTCC_OFFSET); in s32g_rtc_enable()
227 writel(rtcc, priv->rtc_base + RTCC_OFFSET); in rtc_clk_src_setup()
283 priv->rtc_base = devm_platform_ioremap_resource(pdev, 0); in s32g_rtc_probe()
284 if (IS_ERR(priv->rtc_base)) in s32g_rtc_probe()
285 return PTR_ERR(priv->rtc_base); in s32g_rtc_probe()
341 u32 apival = readl(priv->rtc_base + APIVAL_OFFSET); in s32g_rtc_suspend()