Lines Matching refs:rtcc
118 u32 rtcc, rtcs; in s32g_rtc_read_alarm() local
120 rtcc = readl(priv->rtc_base + RTCC_OFFSET); in s32g_rtc_read_alarm()
123 alrm->enabled = rtcc & RTCC_APIIE; in s32g_rtc_read_alarm()
133 u32 rtcc; in s32g_rtc_alarm_irq_enable() local
138 rtcc = readl(priv->rtc_base + RTCC_OFFSET); in s32g_rtc_alarm_irq_enable()
139 rtcc |= RTCC_APIEN | RTCC_APIIE; in s32g_rtc_alarm_irq_enable()
140 writel(rtcc, priv->rtc_base + RTCC_OFFSET); in s32g_rtc_alarm_irq_enable()
184 u32 rtcc = readl(priv->rtc_base + RTCC_OFFSET); in s32g_rtc_disable() local
186 rtcc &= ~RTCC_CNTEN; in s32g_rtc_disable()
187 writel(rtcc, priv->rtc_base + RTCC_OFFSET); in s32g_rtc_disable()
192 u32 rtcc = readl(priv->rtc_base + RTCC_OFFSET); in s32g_rtc_enable() local
194 rtcc |= RTCC_CNTEN; in s32g_rtc_enable()
195 writel(rtcc, priv->rtc_base + RTCC_OFFSET); in s32g_rtc_enable()
200 u32 rtcc; in rtc_clk_src_setup() local
202 rtcc = FIELD_PREP(RTCC_CLKSEL_MASK, priv->clk_src_idx); in rtc_clk_src_setup()
206 rtcc |= RTCC_DIV512EN; in rtc_clk_src_setup()
207 rtcc |= RTCC_DIV32EN; in rtc_clk_src_setup()
210 rtcc |= RTCC_DIV512EN; in rtc_clk_src_setup()
213 rtcc |= RTCC_DIV32EN; in rtc_clk_src_setup()
221 rtcc |= RTCC_APIEN | RTCC_APIIE; in rtc_clk_src_setup()
227 writel(rtcc, priv->rtc_base + RTCC_OFFSET); in rtc_clk_src_setup()