Lines Matching refs:NCR5380_write
431 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_init()
432 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_init()
433 NCR5380_write(TARGET_COMMAND_REG, 0); in NCR5380_init()
434 NCR5380_write(SELECT_ENABLE_REG, 0); in NCR5380_init()
735 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); in NCR5380_main()
793 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_dma_complete()
794 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_dma_complete()
892 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_intr()
898 NCR5380_write(SELECT_ENABLE_REG, 0); in NCR5380_intr()
908 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); in NCR5380_intr()
994 NCR5380_write(TARGET_COMMAND_REG, 0); in NCR5380_select()
1000 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); in NCR5380_select()
1001 NCR5380_write(MODE_REG, MR_ARBITRATE); in NCR5380_select()
1018 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_select()
1022 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_select()
1036 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_select()
1046 NCR5380_write(INITIATOR_COMMAND_REG, in NCR5380_select()
1066 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_select()
1067 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_select()
1078 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); in NCR5380_select()
1086 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | in NCR5380_select()
1088 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_select()
1094 NCR5380_write(SELECT_ENABLE_REG, 0); in NCR5380_select()
1105 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | in NCR5380_select()
1139 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_select()
1147 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_select()
1169 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); in NCR5380_select()
1184 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_select()
1201 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_select()
1261 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); in NCR5380_transfer_pio()
1284 NCR5380_write(OUTPUT_DATA_REG, *d); in NCR5380_transfer_pio()
1299 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); in NCR5380_transfer_pio()
1301 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | in NCR5380_transfer_pio()
1304 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | in NCR5380_transfer_pio()
1307 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | in NCR5380_transfer_pio()
1312 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); in NCR5380_transfer_pio()
1336 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); in NCR5380_transfer_pio()
1338 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_transfer_pio()
1375 NCR5380_write(TARGET_COMMAND_REG, in do_reset()
1377 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); in do_reset()
1379 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in do_reset()
1401 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); in do_abort()
1420 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); in do_abort()
1423 NCR5380_write(INITIATOR_COMMAND_REG, in do_abort()
1429 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); in do_abort()
1446 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in do_abort()
1503 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); in NCR5380_transfer_dma()
1504 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | in NCR5380_transfer_dma()
1523 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_transfer_dma()
1525 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); in NCR5380_transfer_dma()
1528 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); in NCR5380_transfer_dma()
1530 NCR5380_write(START_DMA_SEND_REG, 0); in NCR5380_transfer_dma()
1711 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); in NCR5380_information_transfer()
1713 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | in NCR5380_information_transfer()
1717 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | in NCR5380_information_transfer()
1808 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_information_transfer()
1837 NCR5380_write(TARGET_COMMAND_REG, 0); in NCR5380_information_transfer()
1842 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_information_transfer()
1856 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_information_transfer()
1867 NCR5380_write(TARGET_COMMAND_REG, 0); in NCR5380_information_transfer()
1886 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_information_transfer()
1895 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_information_transfer()
1912 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_information_transfer()
1956 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); in NCR5380_information_transfer()
2038 NCR5380_write(MODE_REG, MR_BASE); in NCR5380_reselect()
2056 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); in NCR5380_reselect()
2060 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_reselect()
2063 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_reselect()
2081 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); in NCR5380_reselect()
2168 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); in NCR5380_reselect()
2172 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); in NCR5380_reselect()
2330 NCR5380_write(MODE_REG, MR_BASE); in bus_reset_cleanup()
2331 NCR5380_write(TARGET_COMMAND_REG, 0); in bus_reset_cleanup()
2332 NCR5380_write(SELECT_ENABLE_REG, 0); in bus_reset_cleanup()