Lines Matching refs:curregs
77 unsigned char curregs[NUM_ZSREGS]; member
275 __load_zsregs(channel, up->curregs); in sunzilog_maybe_update_regs()
289 up->curregs[R12] = (brg & 0xff); in sunzilog_change_mouse_baud()
290 up->curregs[R13] = (brg >> 8) & 0xff; in sunzilog_change_mouse_baud()
478 __load_zsregs(channel, up->curregs); in sunzilog_transmit_chars()
660 up->curregs[R5] |= set_bits; in sunzilog_set_mctrl()
661 up->curregs[R5] &= ~clear_bits; in sunzilog_set_mctrl()
662 write_zsreg(channel, R5, up->curregs[R5]); in sunzilog_set_mctrl()
729 up->curregs[R1] &= ~RxINT_MASK; in sunzilog_stop_rx()
741 new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); in sunzilog_enable_ms()
742 if (new_reg != up->curregs[R15]) { in sunzilog_enable_ms()
743 up->curregs[R15] = new_reg; in sunzilog_enable_ms()
746 write_zsreg(channel, R15, up->curregs[R15] & ~WR7pEN); in sunzilog_enable_ms()
768 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; in sunzilog_break_ctl()
769 if (new_reg != up->curregs[R5]) { in sunzilog_break_ctl()
770 up->curregs[R5] = new_reg; in sunzilog_break_ctl()
773 write_zsreg(channel, R5, up->curregs[R5]); in sunzilog_break_ctl()
787 up->curregs[R3] |= RxENAB; in __sunzilog_startup()
788 up->curregs[R5] |= TxENAB; in __sunzilog_startup()
790 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __sunzilog_startup()
847 up->curregs[R3] &= ~RxENAB; in sunzilog_shutdown()
848 up->curregs[R5] &= ~TxENAB; in sunzilog_shutdown()
851 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in sunzilog_shutdown()
852 up->curregs[R5] &= ~SND_BRK; in sunzilog_shutdown()
866 up->curregs[R10] = NRZ; in sunzilog_convert_to_zs()
867 up->curregs[R11] = TCBR | RCBR; in sunzilog_convert_to_zs()
870 up->curregs[R4] &= ~XCLK_MASK; in sunzilog_convert_to_zs()
871 up->curregs[R4] |= X16CLK; in sunzilog_convert_to_zs()
872 up->curregs[R12] = brg & 0xff; in sunzilog_convert_to_zs()
873 up->curregs[R13] = (brg >> 8) & 0xff; in sunzilog_convert_to_zs()
874 up->curregs[R14] = BRSRC | BRENAB; in sunzilog_convert_to_zs()
877 up->curregs[R3] &= ~RxN_MASK; in sunzilog_convert_to_zs()
878 up->curregs[R5] &= ~TxN_MASK; in sunzilog_convert_to_zs()
881 up->curregs[R3] |= Rx5; in sunzilog_convert_to_zs()
882 up->curregs[R5] |= Tx5; in sunzilog_convert_to_zs()
886 up->curregs[R3] |= Rx6; in sunzilog_convert_to_zs()
887 up->curregs[R5] |= Tx6; in sunzilog_convert_to_zs()
891 up->curregs[R3] |= Rx7; in sunzilog_convert_to_zs()
892 up->curregs[R5] |= Tx7; in sunzilog_convert_to_zs()
897 up->curregs[R3] |= Rx8; in sunzilog_convert_to_zs()
898 up->curregs[R5] |= Tx8; in sunzilog_convert_to_zs()
902 up->curregs[R4] &= ~0x0c; in sunzilog_convert_to_zs()
904 up->curregs[R4] |= SB2; in sunzilog_convert_to_zs()
906 up->curregs[R4] |= SB1; in sunzilog_convert_to_zs()
908 up->curregs[R4] |= PAR_ENAB; in sunzilog_convert_to_zs()
910 up->curregs[R4] &= ~PAR_ENAB; in sunzilog_convert_to_zs()
912 up->curregs[R4] |= PAR_EVEN; in sunzilog_convert_to_zs()
914 up->curregs[R4] &= ~PAR_EVEN; in sunzilog_convert_to_zs()
1248 up->curregs[R15] |= BRKIE; in sunzilog_console_setup()
1290 up->curregs[R15] |= BRKIE; in sunzilog_init_kbdms()
1344 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in sunzilog_init_hw()
1345 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in sunzilog_init_hw()
1346 up->curregs[R3] = RxENAB | Rx8; in sunzilog_init_hw()
1347 up->curregs[R5] = TxENAB | Tx8; in sunzilog_init_hw()
1348 up->curregs[R6] = 0x00; /* SDLC Address */ in sunzilog_init_hw()
1349 up->curregs[R7] = 0x7E; /* SDLC Flag */ in sunzilog_init_hw()
1350 up->curregs[R9] = NV; in sunzilog_init_hw()
1351 up->curregs[R7p] = 0x00; in sunzilog_init_hw()
1355 up->curregs[R9] |= MIE; in sunzilog_init_hw()
1356 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init_hw()
1360 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in sunzilog_init_hw()
1361 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in sunzilog_init_hw()
1362 up->curregs[R3] = RxENAB | Rx8; in sunzilog_init_hw()
1363 up->curregs[R5] = TxENAB | Tx8; in sunzilog_init_hw()
1364 up->curregs[R6] = 0x00; /* SDLC Address */ in sunzilog_init_hw()
1365 up->curregs[R7] = 0x7E; /* SDLC Flag */ in sunzilog_init_hw()
1366 up->curregs[R9] = NV; in sunzilog_init_hw()
1367 up->curregs[R10] = NRZ; in sunzilog_init_hw()
1368 up->curregs[R11] = TCBR | RCBR; in sunzilog_init_hw()
1371 up->curregs[R12] = (brg & 0xff); in sunzilog_init_hw()
1372 up->curregs[R13] = (brg >> 8) & 0xff; in sunzilog_init_hw()
1373 up->curregs[R14] = BRSRC | BRENAB; in sunzilog_init_hw()
1374 up->curregs[R15] = FIFOEN; /* Use FIFO if on ESCC */ in sunzilog_init_hw()
1375 up->curregs[R7p] = TxFIFO_LVL | RxFIFO_LVL; in sunzilog_init_hw()
1376 if (__load_zsregs(channel, up->curregs)) { in sunzilog_init_hw()
1381 up->curregs[R9] |= MIE; in sunzilog_init_hw()
1382 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init_hw()
1588 up->curregs[R9] |= MIE; in sunzilog_init()
1589 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_init()
1625 up->curregs[R9] &= ~MIE; in sunzilog_exit()
1626 write_zsreg(channel, R9, up->curregs[R9]); in sunzilog_exit()