Lines Matching refs:lcdc
71 } lcdc; variable
75 lcdc.irq_mask |= mask; in enable_irqs()
80 lcdc.irq_mask &= ~mask; in disable_irqs()
111 l |= lcdc.irq_mask | OMAP_LCDC_IRQ_DONE; /* enabled IRQs */ in enable_controller()
133 init_completion(&lcdc.last_frame_complete); in disable_controller()
135 if (!wait_for_completion_timeout(&lcdc.last_frame_complete, in disable_controller()
137 dev_err(lcdc.fbdev->dev, "timeout waiting for FRAME DONE\n"); in disable_controller()
148 dev_err(lcdc.fbdev->dev, in reset_controller()
157 dev_err(lcdc.fbdev->dev, in reset_controller()
175 struct omapfb_plane_struct *plane = lcdc.fbdev->fb_info[0]->par; in setup_lcd_dma()
176 struct fb_var_screeninfo *var = &lcdc.fbdev->fb_info[0]->var; in setup_lcd_dma()
180 src = lcdc.vram_phys + lcdc.frame_offset; in setup_lcd_dma()
185 lcdc.color_mode == OMAPFB_COLOR_YUV420 || in setup_lcd_dma()
186 (lcdc.xres & 1)) in setup_lcd_dma()
190 xelem = lcdc.xres * lcdc.bpp / 8 / esize; in setup_lcd_dma()
191 yelem = lcdc.yres; in setup_lcd_dma()
200 xelem = lcdc.yres * lcdc.bpp / 16; in setup_lcd_dma()
201 yelem = lcdc.xres; in setup_lcd_dma()
208 dev_dbg(lcdc.fbdev->dev, in setup_lcd_dma()
214 int bpp = lcdc.bpp; in setup_lcd_dma()
220 if (lcdc.color_mode == OMAPFB_COLOR_YUV420) in setup_lcd_dma()
224 lcdc.screen_width * bpp / 8 / esize); in setup_lcd_dma()
252 complete(&lcdc.last_frame_complete); in lcdc_irq_handler()
256 complete(&lcdc.palette_load_complete); in lcdc_irq_handler()
287 struct fb_var_screeninfo *var = &lcdc.fbdev->fb_info[0]->var; in omap_lcdc_setup_plane()
288 struct lcd_panel *panel = lcdc.fbdev->panel; in omap_lcdc_setup_plane()
301 dev_dbg(lcdc.fbdev->dev, in omap_lcdc_setup_plane()
308 lcdc.frame_offset = offset; in omap_lcdc_setup_plane()
309 lcdc.xres = width; in omap_lcdc_setup_plane()
310 lcdc.yres = height; in omap_lcdc_setup_plane()
311 lcdc.screen_width = screen_width; in omap_lcdc_setup_plane()
312 lcdc.color_mode = color_mode; in omap_lcdc_setup_plane()
316 lcdc.bpp = 8; in omap_lcdc_setup_plane()
317 lcdc.palette_code = 0x3000; in omap_lcdc_setup_plane()
318 lcdc.palette_size = 512; in omap_lcdc_setup_plane()
321 lcdc.bpp = 16; in omap_lcdc_setup_plane()
322 lcdc.palette_code = 0x4000; in omap_lcdc_setup_plane()
323 lcdc.palette_size = 32; in omap_lcdc_setup_plane()
326 lcdc.bpp = 16; in omap_lcdc_setup_plane()
327 lcdc.palette_code = 0x4000; in omap_lcdc_setup_plane()
328 lcdc.palette_size = 32; in omap_lcdc_setup_plane()
331 if (lcdc.ext_mode) { in omap_lcdc_setup_plane()
332 lcdc.bpp = 12; in omap_lcdc_setup_plane()
337 if (lcdc.ext_mode) { in omap_lcdc_setup_plane()
338 lcdc.bpp = 16; in omap_lcdc_setup_plane()
349 dev_dbg(lcdc.fbdev->dev, "invalid color mode %d\n", color_mode); in omap_lcdc_setup_plane()
354 if (lcdc.ext_mode) { in omap_lcdc_setup_plane()
359 if (lcdc.update_mode == OMAPFB_AUTO_UPDATE) { in omap_lcdc_setup_plane()
371 dev_dbg(lcdc.fbdev->dev, in omap_lcdc_enable_plane()
373 plane, enable, lcdc.update_mode, lcdc.ext_mode); in omap_lcdc_enable_plane()
389 palette = (u16 *)lcdc.palette_virt; in load_palette()
392 *(u16 *)palette |= lcdc.palette_code; in load_palette()
394 omap_set_lcd_dma_b1(lcdc.palette_phys, in load_palette()
395 lcdc.palette_size / 4 + 1, 1, OMAP_DMA_DATA_TYPE_S32); in load_palette()
400 init_completion(&lcdc.palette_load_complete); in load_palette()
404 if (!wait_for_completion_timeout(&lcdc.palette_load_complete, in load_palette()
406 dev_err(lcdc.fbdev->dev, "timeout waiting for FRAME DONE\n"); in load_palette()
411 omap_set_lcd_dma_single_transfer(lcdc.ext_mode); in load_palette()
420 if (lcdc.color_mode != OMAPFB_COLOR_CLUT_8BPP || regno > 255) in omap_lcdc_setcolreg()
423 palette = (u16 *)lcdc.palette_virt; in omap_lcdc_setcolreg()
446 lck = clk_get_rate(lcdc.lcd_ck); in calc_ck_div()
455 dev_warn(lcdc.fbdev->dev, "pixclock %d kHz too low.\n", in calc_ck_div()
463 struct lcd_panel *panel = lcdc.fbdev->panel; in setup_regs()
499 lck = clk_get_rate(lcdc.lcd_ck); in setup_regs()
504 dev_warn(lcdc.fbdev->dev, in setup_regs()
529 if (mode != lcdc.update_mode) { in omap_lcdc_set_update_mode()
542 lcdc.update_mode = mode; in omap_lcdc_set_update_mode()
547 lcdc.update_mode = mode; in omap_lcdc_set_update_mode()
559 return lcdc.update_mode; in omap_lcdc_get_update_mode()
582 if (lcdc.dma_callback) in omap_lcdc_set_dma_callback()
585 lcdc.dma_callback = callback; in omap_lcdc_set_dma_callback()
586 lcdc.dma_callback_data = data; in omap_lcdc_set_dma_callback()
594 lcdc.dma_callback = NULL; in omap_lcdc_free_dma_callback()
600 if (lcdc.dma_callback) in lcdc_dma_handler()
601 lcdc.dma_callback(lcdc.dma_callback_data); in lcdc_dma_handler()
606 lcdc.palette_virt = dma_alloc_wc(lcdc.fbdev->dev, MAX_PALETTE_SIZE, in alloc_palette_ram()
607 &lcdc.palette_phys, GFP_KERNEL); in alloc_palette_ram()
608 if (lcdc.palette_virt == NULL) { in alloc_palette_ram()
609 dev_err(lcdc.fbdev->dev, "failed to alloc palette memory\n"); in alloc_palette_ram()
612 memset(lcdc.palette_virt, 0, MAX_PALETTE_SIZE); in alloc_palette_ram()
619 dma_free_wc(lcdc.fbdev->dev, MAX_PALETTE_SIZE, lcdc.palette_virt, in free_palette_ram()
620 lcdc.palette_phys); in free_palette_ram()
627 struct lcd_panel *panel = lcdc.fbdev->panel; in alloc_fbmem()
635 lcdc.vram_size = frame_size; in alloc_fbmem()
636 lcdc.vram_virt = dma_alloc_wc(lcdc.fbdev->dev, lcdc.vram_size, in alloc_fbmem()
637 &lcdc.vram_phys, GFP_KERNEL); in alloc_fbmem()
638 if (lcdc.vram_virt == NULL) { in alloc_fbmem()
639 dev_err(lcdc.fbdev->dev, "unable to allocate FB DMA memory\n"); in alloc_fbmem()
643 region->paddr = lcdc.vram_phys; in alloc_fbmem()
644 region->vaddr = lcdc.vram_virt; in alloc_fbmem()
647 memset(lcdc.vram_virt, 0, lcdc.vram_size); in alloc_fbmem()
654 dma_free_wc(lcdc.fbdev->dev, lcdc.vram_size, lcdc.vram_virt, in free_fbmem()
655 lcdc.vram_phys); in free_fbmem()
661 dev_err(lcdc.fbdev->dev, "no memory regions defined\n"); in setup_fbmem()
666 dev_err(lcdc.fbdev->dev, "only one plane is supported\n"); in setup_fbmem()
681 lcdc.irq_mask = 0; in omap_lcdc_init()
683 lcdc.fbdev = fbdev; in omap_lcdc_init()
684 lcdc.ext_mode = ext_mode; in omap_lcdc_init()
692 lcdc.lcd_ck = clk_get(fbdev->dev, "lcd_ck"); in omap_lcdc_init()
693 if (IS_ERR(lcdc.lcd_ck)) { in omap_lcdc_init()
695 r = PTR_ERR(lcdc.lcd_ck); in omap_lcdc_init()
711 r = clk_set_rate(lcdc.lcd_ck, rate); in omap_lcdc_init()
716 clk_prepare_enable(lcdc.lcd_ck); in omap_lcdc_init()
749 free_irq(fbdev->int_irq, lcdc.fbdev); in omap_lcdc_init()
751 clk_disable_unprepare(lcdc.lcd_ck); in omap_lcdc_init()
753 clk_put(lcdc.lcd_ck); in omap_lcdc_init()
760 if (!lcdc.ext_mode) in omap_lcdc_cleanup()
764 free_irq(lcdc.fbdev->int_irq, lcdc.fbdev); in omap_lcdc_cleanup()
765 clk_disable_unprepare(lcdc.lcd_ck); in omap_lcdc_cleanup()
766 clk_put(lcdc.lcd_ck); in omap_lcdc_cleanup()