Lines Matching refs:uint16_t
64 uint16_t reserved1;
65 uint16_t mclk_id;
78 uint16_t tdm_slot_width;
79 uint16_t reserved2; /* alignment */
84 uint16_t frame_pulse_width;
85 uint16_t tdm_per_slot_padding_flag;
133 uint16_t id; /**< PDM controller ID */
135 uint16_t enable_mic_a; /**< Use A (left) channel mic (0 or 1)*/
136 uint16_t enable_mic_b; /**< Use B (right) channel mic (0 or 1)*/
138 uint16_t polarity_mic_a; /**< Optionally invert mic A signal (0 or 1) */
139 uint16_t polarity_mic_b; /**< Optionally invert mic B signal (0 or 1) */
141 uint16_t clk_edge; /**< Optionally swap data clock edge (0 or 1) */
142 uint16_t skew; /**< Adjust PDM data sampling vs. clock (0..15) */
144 uint16_t reserved[3]; /**< Make sure the total size is 4 bytes aligned */
185 uint16_t fifo_bits; /**< FIFO word length (16 or 32) */
186 uint16_t fifo_bits_b; /**< Deprecated since firmware ABI 3.0.1 */
188 uint16_t duty_min; /**< Min. mic clock duty cycle in % (20..80) */
189 uint16_t duty_max; /**< Max. mic clock duty cycle in % (min..80) */