Lines Matching refs:ichdev
308 struct ichdev { struct
351 struct ichdev ichd[6]; argument
636 static void snd_intel8x0_setup_periods(struct intel8x0 *chip, struct ichdev *ichdev) in snd_intel8x0_setup_periods() argument
639 __le32 *bdbar = ichdev->bdbar; in snd_intel8x0_setup_periods()
640 unsigned long port = ichdev->reg_offset; in snd_intel8x0_setup_periods()
642 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); in snd_intel8x0_setup_periods()
643 if (ichdev->size == ichdev->fragsize) { in snd_intel8x0_setup_periods()
644 ichdev->ack_reload = ichdev->ack = 2; in snd_intel8x0_setup_periods()
645 ichdev->fragsize1 = ichdev->fragsize >> 1; in snd_intel8x0_setup_periods()
647 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf); in snd_intel8x0_setup_periods()
649 ichdev->fragsize1 >> ichdev->pos_shift); in snd_intel8x0_setup_periods()
650 bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1)); in snd_intel8x0_setup_periods()
652 ichdev->fragsize1 >> ichdev->pos_shift); in snd_intel8x0_setup_periods()
654 ichdev->frags = 2; in snd_intel8x0_setup_periods()
656 ichdev->ack_reload = ichdev->ack = 1; in snd_intel8x0_setup_periods()
657 ichdev->fragsize1 = ichdev->fragsize; in snd_intel8x0_setup_periods()
659 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + in snd_intel8x0_setup_periods()
660 (((idx >> 1) * ichdev->fragsize) % in snd_intel8x0_setup_periods()
661 ichdev->size)); in snd_intel8x0_setup_periods()
663 ichdev->fragsize >> ichdev->pos_shift); in snd_intel8x0_setup_periods()
669 ichdev->frags = ichdev->size / ichdev->fragsize; in snd_intel8x0_setup_periods()
671 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK); in snd_intel8x0_setup_periods()
672 ichdev->civ = 0; in snd_intel8x0_setup_periods()
674 ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags; in snd_intel8x0_setup_periods()
675 ichdev->position = 0; in snd_intel8x0_setup_periods()
679 ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, in snd_intel8x0_setup_periods()
680 ichdev->fragsize1); in snd_intel8x0_setup_periods()
683 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0_setup_periods()
690 static inline void snd_intel8x0_update(struct intel8x0 *chip, struct ichdev *ichdev) in snd_intel8x0_update() argument
692 unsigned long port = ichdev->reg_offset; in snd_intel8x0_update()
697 if (!(ichdev->prepared || chip->in_measurement) || ichdev->suspended) in snd_intel8x0_update()
701 status = igetbyte(chip, port + ichdev->roff_sr); in snd_intel8x0_update()
705 } else if (civ == ichdev->civ) { in snd_intel8x0_update()
707 ichdev->civ++; in snd_intel8x0_update()
708 ichdev->civ &= ICH_REG_LVI_MASK; in snd_intel8x0_update()
710 step = civ - ichdev->civ; in snd_intel8x0_update()
713 ichdev->civ = civ; in snd_intel8x0_update()
716 ichdev->position += step * ichdev->fragsize1; in snd_intel8x0_update()
718 ichdev->position %= ichdev->size; in snd_intel8x0_update()
719 ichdev->lvi += step; in snd_intel8x0_update()
720 ichdev->lvi &= ICH_REG_LVI_MASK; in snd_intel8x0_update()
721 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); in snd_intel8x0_update()
723 ichdev->lvi_frag++; in snd_intel8x0_update()
724 ichdev->lvi_frag %= ichdev->frags; in snd_intel8x0_update()
725 …ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize… in snd_intel8x0_update()
729 ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2], in snd_intel8x0_update()
730 ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port), in snd_intel8x0_update()
733 if (--ichdev->ack == 0) { in snd_intel8x0_update()
734 ichdev->ack = ichdev->ack_reload; in snd_intel8x0_update()
739 if (ack && ichdev->substream) { in snd_intel8x0_update()
740 snd_pcm_period_elapsed(ichdev->substream); in snd_intel8x0_update()
742 iputbyte(chip, port + ichdev->roff_sr, in snd_intel8x0_update()
749 struct ichdev *ichdev; in snd_intel8x0_interrupt() local
768 ichdev = &chip->ichd[i]; in snd_intel8x0_interrupt()
769 if (status & ichdev->int_sta_mask) in snd_intel8x0_interrupt()
770 snd_intel8x0_update(chip, ichdev); in snd_intel8x0_interrupt()
786 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_pcm_trigger() local
788 unsigned long port = ichdev->reg_offset; in snd_intel8x0_pcm_trigger()
792 ichdev->suspended = 0; in snd_intel8x0_pcm_trigger()
797 ichdev->last_pos = ichdev->position; in snd_intel8x0_pcm_trigger()
800 ichdev->suspended = 1; in snd_intel8x0_pcm_trigger()
814 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ; in snd_intel8x0_pcm_trigger()
824 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_ali_trigger() local
825 unsigned long port = ichdev->reg_offset; in snd_intel8x0_ali_trigger()
834 ichdev->suspended = 0; in snd_intel8x0_ali_trigger()
840 fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]); in snd_intel8x0_ali_trigger()
841 fifo &= ~(0xff << (ichdev->ali_slot % 4)); in snd_intel8x0_ali_trigger()
842 fifo |= 0x83 << (ichdev->ali_slot % 4); in snd_intel8x0_ali_trigger()
843 iputdword(chip, fiforeg[ichdev->ali_slot / 4], fifo); in snd_intel8x0_ali_trigger()
846 val &= ~(1 << (ichdev->ali_slot + 16)); /* clear PAUSE flag */ in snd_intel8x0_ali_trigger()
848 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << ichdev->ali_slot)); in snd_intel8x0_ali_trigger()
851 ichdev->suspended = 1; in snd_intel8x0_ali_trigger()
856 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << (ichdev->ali_slot + 16))); in snd_intel8x0_ali_trigger()
868 igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & ichdev->int_sta_mask); in snd_intel8x0_ali_trigger()
880 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_hw_params() local
884 if (ichdev->pcm_open_flag) { in snd_intel8x0_hw_params()
885 snd_ac97_pcm_close(ichdev->pcm); in snd_intel8x0_hw_params()
886 ichdev->pcm_open_flag = 0; in snd_intel8x0_hw_params()
887 ichdev->prepared = 0; in snd_intel8x0_hw_params()
889 err = snd_ac97_pcm_open(ichdev->pcm, params_rate(hw_params), in snd_intel8x0_hw_params()
891 ichdev->pcm->r[dbl].slots); in snd_intel8x0_hw_params()
893 ichdev->pcm_open_flag = 1; in snd_intel8x0_hw_params()
895 if (ichdev->ichd == ICHD_PCMOUT && chip->spdif_idx < 0) in snd_intel8x0_hw_params()
896 snd_ac97_set_rate(ichdev->pcm->r[0].codec[0], AC97_SPDIF, in snd_intel8x0_hw_params()
904 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_hw_free() local
906 if (ichdev->pcm_open_flag) { in snd_intel8x0_hw_free()
907 snd_ac97_pcm_close(ichdev->pcm); in snd_intel8x0_hw_free()
908 ichdev->pcm_open_flag = 0; in snd_intel8x0_hw_free()
909 ichdev->prepared = 0; in snd_intel8x0_hw_free()
973 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_pcm_prepare() local
975 ichdev->physbuf = runtime->dma_addr; in snd_intel8x0_pcm_prepare()
976 ichdev->size = snd_pcm_lib_buffer_bytes(substream); in snd_intel8x0_pcm_prepare()
977 ichdev->fragsize = snd_pcm_lib_period_bytes(substream); in snd_intel8x0_pcm_prepare()
978 if (ichdev->ichd == ICHD_PCMOUT) { in snd_intel8x0_pcm_prepare()
981 ichdev->pos_shift = (runtime->sample_bits > 16) ? 2 : 1; in snd_intel8x0_pcm_prepare()
983 snd_intel8x0_setup_periods(chip, ichdev); in snd_intel8x0_pcm_prepare()
984 ichdev->prepared = 1; in snd_intel8x0_pcm_prepare()
991 struct ichdev *ichdev = get_ichdev(substream); in snd_intel8x0_pcm_pointer() local
998 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV); in snd_intel8x0_pcm_pointer()
999 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb); in snd_intel8x0_pcm_pointer()
1000 position = ichdev->position; in snd_intel8x0_pcm_pointer()
1005 if (civ != igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV)) in snd_intel8x0_pcm_pointer()
1016 if (ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) in snd_intel8x0_pcm_pointer()
1019 ptr = ichdev->last_pos; in snd_intel8x0_pcm_pointer()
1021 ptr1 <<= ichdev->pos_shift; in snd_intel8x0_pcm_pointer()
1022 ptr = ichdev->fragsize1 - ptr1; in snd_intel8x0_pcm_pointer()
1024 if (ptr < ichdev->last_pos) { in snd_intel8x0_pcm_pointer()
1026 pos_base = position / ichdev->fragsize1; in snd_intel8x0_pcm_pointer()
1027 last_base = ichdev->last_pos / ichdev->fragsize1; in snd_intel8x0_pcm_pointer()
1032 ptr = ichdev->last_pos; in snd_intel8x0_pcm_pointer()
1035 ichdev->last_pos = ptr; in snd_intel8x0_pcm_pointer()
1037 if (ptr >= ichdev->size) in snd_intel8x0_pcm_pointer()
1093 static int snd_intel8x0_pcm_open(struct snd_pcm_substream *substream, struct ichdev *ichdev) in snd_intel8x0_pcm_open() argument
1099 ichdev->substream = substream; in snd_intel8x0_pcm_open()
1101 runtime->hw.rates = ichdev->pcm->rates; in snd_intel8x0_pcm_open()
1110 runtime->private_data = ichdev; in snd_intel8x0_pcm_open()
2611 struct ichdev *ichdev = &chip->ichd[i]; in intel8x0_resume() local
2612 unsigned long port = ichdev->reg_offset; in intel8x0_resume()
2613 if (! ichdev->substream || ! ichdev->suspended) in intel8x0_resume()
2615 if (ichdev->ichd == ICHD_PCMOUT) in intel8x0_resume()
2616 snd_intel8x0_setup_pcm_out(chip, ichdev->substream->runtime); in intel8x0_resume()
2617 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); in intel8x0_resume()
2618 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); in intel8x0_resume()
2619 iputbyte(chip, port + ICH_REG_OFF_CIV, ichdev->civ); in intel8x0_resume()
2620 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in intel8x0_resume()
2634 struct ichdev *ichdev; in intel8x0_measure_ac97_clock() local
2652 ichdev = &chip->ichd[ICHD_PCMOUT]; in intel8x0_measure_ac97_clock()
2653 ichdev->physbuf = subs->dma_buffer.addr; in intel8x0_measure_ac97_clock()
2654 ichdev->size = ichdev->fragsize = INTEL8X0_TESTBUF_SIZE; in intel8x0_measure_ac97_clock()
2655 ichdev->substream = NULL; /* don't process interrupts */ in intel8x0_measure_ac97_clock()
2663 snd_intel8x0_setup_periods(chip, ichdev); in intel8x0_measure_ac97_clock()
2664 port = ichdev->reg_offset; in intel8x0_measure_ac97_clock()
2672 iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot); in intel8x0_measure_ac97_clock()
2680 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV); in intel8x0_measure_ac97_clock()
2681 pos1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb); in intel8x0_measure_ac97_clock()
2686 if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) && in intel8x0_measure_ac97_clock()
2687 pos1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb)) in intel8x0_measure_ac97_clock()
2693 pos = ichdev->fragsize1; in intel8x0_measure_ac97_clock()
2694 pos -= pos1 << ichdev->pos_shift; in intel8x0_measure_ac97_clock()
2695 pos += ichdev->position; in intel8x0_measure_ac97_clock()
2701 iputdword(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 16)); in intel8x0_measure_ac97_clock()
2707 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) in intel8x0_measure_ac97_clock()
2868 struct ichdev *ichdev; in snd_intel8x0_init() local
2962 ichdev = &chip->ichd[i]; in snd_intel8x0_init()
2963 ichdev->ichd = i; in snd_intel8x0_init()
2964 ichdev->reg_offset = tbl[i].offset; in snd_intel8x0_init()
2965 ichdev->int_sta_mask = tbl[i].int_sta_mask; in snd_intel8x0_init()
2968 ichdev->roff_sr = ICH_REG_OFF_PICB; in snd_intel8x0_init()
2969 ichdev->roff_picb = ICH_REG_OFF_SR; in snd_intel8x0_init()
2971 ichdev->roff_sr = ICH_REG_OFF_SR; in snd_intel8x0_init()
2972 ichdev->roff_picb = ICH_REG_OFF_PICB; in snd_intel8x0_init()
2975 ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10; in snd_intel8x0_init()
2977 ichdev->pos_shift = (device_type == DEVICE_SIS) ? 0 : 1; in snd_intel8x0_init()
2992 ichdev = &chip->ichd[i]; in snd_intel8x0_init()
2993 ichdev->bdbar = ((__le32 *)chip->bdbars->area) + in snd_intel8x0_init()
2995 ichdev->bdbar_addr = chip->bdbars->addr + in snd_intel8x0_init()
2997 int_sta_masks |= ichdev->int_sta_mask; in snd_intel8x0_init()