Lines Matching refs:regmap
782 int cs35l41_test_key_unlock(struct device *dev, struct regmap *regmap) in cs35l41_test_key_unlock() argument
790 ret = regmap_multi_reg_write(regmap, unlock, ARRAY_SIZE(unlock)); in cs35l41_test_key_unlock()
798 int cs35l41_test_key_lock(struct device *dev, struct regmap *regmap) in cs35l41_test_key_lock() argument
806 ret = regmap_multi_reg_write(regmap, unlock, ARRAY_SIZE(unlock)); in cs35l41_test_key_lock()
815 int cs35l41_otp_unpack(struct device *dev, struct regmap *regmap) in cs35l41_otp_unpack() argument
828 ret = regmap_read(regmap, CS35L41_OTPID, &otp_id_reg); in cs35l41_otp_unpack()
842 ret = regmap_bulk_read(regmap, CS35L41_OTP_MEM0, otp_mem, CS35L41_OTP_SIZE_WORDS); in cs35l41_otp_unpack()
879 ret = regmap_update_bits(regmap, otp_map[i].reg, in cs35l41_otp_unpack()
900 int cs35l41_register_errata_patch(struct device *dev, struct regmap *reg, unsigned int reg_revid) in cs35l41_register_errata_patch()
938 int cs35l41_set_channels(struct device *dev, struct regmap *reg, in cs35l41_set_channels()
988 static int cs35l41_boost_config(struct device *dev, struct regmap *regmap, int boost_ind, in cs35l41_boost_config() argument
1039 ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_COEFF, in cs35l41_boost_config()
1050 ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_SLOPE_LBST, in cs35l41_boost_config()
1062 ret = regmap_update_bits(regmap, CS35L41_BSTCVRT_PEAK_CUR, CS35L41_BST_IPK_MASK, in cs35l41_boost_config()
1069 regmap_update_bits(regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, in cs35l41_boost_config()
1140 int cs35l41_init_boost(struct device *dev, struct regmap *regmap, in cs35l41_init_boost() argument
1147 regmap_multi_reg_write(regmap, cs35l41_actv_seq, ARRAY_SIZE(cs35l41_actv_seq)); in cs35l41_init_boost()
1150 ret = cs35l41_boost_config(dev, regmap, hw_cfg->bst_ind, in cs35l41_init_boost()
1161 regmap_write(regmap, CS35L41_GPIO1_CTRL1, 0x00000001); in cs35l41_init_boost()
1162 regmap_multi_reg_write(regmap, cs35l41_reset_to_safe, in cs35l41_init_boost()
1164 ret = regmap_update_bits(regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, in cs35l41_init_boost()
1168 ret = regmap_multi_reg_write(regmap, cs35l41_pass_seq, in cs35l41_init_boost()
1181 bool cs35l41_safe_reset(struct regmap *regmap, enum cs35l41_boost_type b_type) in cs35l41_safe_reset() argument
1188 regmap_write(regmap, CS35L41_GPIO1_CTRL1, 0x00000001); in cs35l41_safe_reset()
1189 regmap_multi_reg_write(regmap, cs35l41_safe_to_reset, in cs35l41_safe_reset()
1218 int cs35l41_global_enable(struct device *dev, struct regmap *regmap, enum cs35l41_boost_type b_type, in cs35l41_global_enable() argument
1232 ret = regmap_read(regmap, CS35L41_PWR_CTRL1, &pwr_ctl1_val); in cs35l41_global_enable()
1247 regmap_read(regmap, CS35L41_PWR_CTRL3, &pwr_ctrl3); in cs35l41_global_enable()
1248 regmap_read(regmap, CS35L41_GPIO_PAD_CONTROL, &pad_control); in cs35l41_global_enable()
1263 ret = regmap_multi_reg_write(regmap, cs35l41_mdsync_down_seq, in cs35l41_global_enable()
1269 ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, in cs35l41_global_enable()
1276 regmap_write(regmap, CS35L41_IRQ1_STATUS1, pup_pdn_mask); in cs35l41_global_enable()
1279 ret = regmap_update_bits(regmap, CS35L41_PWR_CTRL1, CS35L41_GLOBAL_EN_MASK, in cs35l41_global_enable()
1286 ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, in cs35l41_global_enable()
1293 regmap_write(regmap, CS35L41_IRQ1_STATUS1, pup_pdn_mask); in cs35l41_global_enable()
1299 ret = regmap_multi_reg_write(regmap, cs35l41_safe_to_active_start, in cs35l41_global_enable()
1304 ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, int_status, in cs35l41_global_enable()
1309 cs35l41_test_key_lock(dev, regmap); in cs35l41_global_enable()
1312 regmap_write(regmap, CS35L41_IRQ1_STATUS1, CS35L41_PUP_DONE_MASK); in cs35l41_global_enable()
1315 ret = cs35l41_set_cspl_mbox_cmd(dev, regmap, in cs35l41_global_enable()
1318 ret = regmap_multi_reg_write(regmap, cs35l41_safe_to_active_en_spk, in cs35l41_global_enable()
1322 cs35l41_test_key_lock(dev, regmap); in cs35l41_global_enable()
1325 ret = regmap_multi_reg_write(regmap, cs35l41_active_to_safe_start, in cs35l41_global_enable()
1329 cs35l41_test_key_lock(dev, regmap); in cs35l41_global_enable()
1333 ret = regmap_read_poll_timeout(regmap, CS35L41_IRQ1_STATUS1, int_status, in cs35l41_global_enable()
1338 cs35l41_test_key_lock(dev, regmap); in cs35l41_global_enable()
1341 regmap_write(regmap, CS35L41_IRQ1_STATUS1, CS35L41_PDN_DONE_MASK); in cs35l41_global_enable()
1344 ret = regmap_multi_reg_write(regmap, cs35l41_active_to_safe_end, in cs35l41_global_enable()
1361 int cs35l41_mdsync_up(struct regmap *regmap) in cs35l41_mdsync_up() argument
1363 return regmap_update_bits(regmap, CS35L41_PWR_CTRL3, in cs35l41_mdsync_up()
1368 int cs35l41_gpio_config(struct regmap *regmap, struct cs35l41_hw_cfg *hw_cfg) in cs35l41_gpio_config() argument
1374 regmap_update_bits(regmap, CS35L41_GPIO1_CTRL1, in cs35l41_gpio_config()
1379 regmap_update_bits(regmap, CS35L41_GPIO2_CTRL1, in cs35l41_gpio_config()
1385 regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO1_CTRL_MASK, in cs35l41_gpio_config()
1389 regmap_update_bits(regmap, CS35L41_GPIO_PAD_CONTROL, CS35L41_GPIO2_CTRL_MASK, in cs35l41_gpio_config()
1417 void cs35l41_configure_cs_dsp(struct device *dev, struct regmap *reg, struct cs_dsp *dsp) in cs35l41_configure_cs_dsp()
1423 dsp->regmap = reg; in cs35l41_configure_cs_dsp()
1455 int cs35l41_set_cspl_mbox_cmd(struct device *dev, struct regmap *regmap, in cs35l41_set_cspl_mbox_cmd() argument
1462 ret = regmap_write(regmap, CS35L41_DSP_VIRT1_MBOX_1, cmd); in cs35l41_set_cspl_mbox_cmd()
1473 ret = regmap_read(regmap, CS35L41_DSP_MBOX_2, &sts); in cs35l41_set_cspl_mbox_cmd()
1497 int cs35l41_write_fs_errata(struct device *dev, struct regmap *regmap) in cs35l41_write_fs_errata() argument
1501 ret = regmap_multi_reg_write(regmap, cs35l41_fs_errata_patch, in cs35l41_write_fs_errata()
1510 int cs35l41_enter_hibernate(struct device *dev, struct regmap *regmap, in cs35l41_enter_hibernate() argument
1513 if (!cs35l41_safe_reset(regmap, b_type)) { in cs35l41_enter_hibernate()
1519 regmap_write(regmap, CS35L41_WAKESRC_CTL, 0x0088); in cs35l41_enter_hibernate()
1520 regmap_write(regmap, CS35L41_WAKESRC_CTL, 0x0188); in cs35l41_enter_hibernate()
1523 regmap_write(regmap, CS35L41_DSP_VIRT1_MBOX_1, CSPL_MBOX_CMD_HIBERNATE); in cs35l41_enter_hibernate()
1529 static void cs35l41_wait_for_pwrmgt_sts(struct device *dev, struct regmap *regmap) in cs35l41_wait_for_pwrmgt_sts() argument
1536 ret = regmap_read(regmap, CS35L41_PWRMGT_STS, &sts); in cs35l41_wait_for_pwrmgt_sts()
1548 int cs35l41_exit_hibernate(struct device *dev, struct regmap *regmap) in cs35l41_exit_hibernate() argument
1558 ret = cs35l41_set_cspl_mbox_cmd(dev, regmap, in cs35l41_exit_hibernate()
1573 cs35l41_wait_for_pwrmgt_sts(dev, regmap); in cs35l41_exit_hibernate()
1574 regmap_write(regmap, CS35L41_WAKESRC_CTL, 0x0088); in cs35l41_exit_hibernate()
1576 cs35l41_wait_for_pwrmgt_sts(dev, regmap); in cs35l41_exit_hibernate()
1577 regmap_write(regmap, CS35L41_WAKESRC_CTL, 0x0188); in cs35l41_exit_hibernate()
1579 cs35l41_wait_for_pwrmgt_sts(dev, regmap); in cs35l41_exit_hibernate()
1580 regmap_write(regmap, CS35L41_PWRMGT_CTL, 0x3); in cs35l41_exit_hibernate()