Lines Matching refs:component
310 static void m98088_eq_band(struct snd_soc_component *component, unsigned int dai, in m98088_eq_band() argument
328 snd_soc_component_write(component, eq_reg++, M98088_BYTE1(coefs[i])); in m98088_eq_band()
329 snd_soc_component_write(component, eq_reg++, M98088_BYTE0(coefs[i])); in m98088_eq_band()
383 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic1pre_set() local
384 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic1pre_set()
388 snd_soc_component_update_bits(component, M98088_REG_35_LVL_MIC1, M98088_MICPRE_MASK, in max98088_mic1pre_set()
397 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic1pre_get() local
398 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic1pre_get()
407 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic2pre_set() local
408 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic2pre_set()
412 snd_soc_component_update_bits(component, M98088_REG_36_LVL_MIC2, M98088_MICPRE_MASK, in max98088_mic2pre_set()
421 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_mic2pre_get() local
422 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic2pre_get()
617 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98088_mic_event() local
618 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_mic_event()
623 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, in max98088_mic_event()
626 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, in max98088_mic_event()
631 snd_soc_component_update_bits(component, w->reg, M98088_MICPRE_MASK, 0); in max98088_mic_event()
647 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98088_line_pga() local
648 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_line_pga()
668 snd_soc_component_update_bits(component, w->reg, in max98088_line_pga()
674 snd_soc_component_update_bits(component, w->reg, in max98088_line_pga()
947 struct snd_soc_component *component = dai->component; in max98088_dai1_hw_params() local
948 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai1_hw_params()
960 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_hw_params()
964 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_hw_params()
971 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); in max98088_dai1_hw_params()
976 snd_soc_component_update_bits(component, M98088_REG_11_DAI1_CLKMODE, in max98088_dai1_hw_params()
981 if (snd_soc_component_read(component, M98088_REG_14_DAI1_FORMAT) in max98088_dai1_hw_params()
986 dev_err(component->dev, "Invalid system clock frequency\n"); in max98088_dai1_hw_params()
993 snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, in max98088_dai1_hw_params()
995 snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, in max98088_dai1_hw_params()
1001 snd_soc_component_update_bits(component, M98088_REG_18_DAI1_FILTERS, in max98088_dai1_hw_params()
1004 snd_soc_component_update_bits(component, M98088_REG_18_DAI1_FILTERS, in max98088_dai1_hw_params()
1007 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, in max98088_dai1_hw_params()
1017 struct snd_soc_component *component = dai->component; in max98088_dai2_hw_params() local
1018 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai2_hw_params()
1030 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_hw_params()
1034 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_hw_params()
1041 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, 0); in max98088_dai2_hw_params()
1046 snd_soc_component_update_bits(component, M98088_REG_19_DAI2_CLKMODE, in max98088_dai2_hw_params()
1051 if (snd_soc_component_read(component, M98088_REG_1C_DAI2_FORMAT) in max98088_dai2_hw_params()
1056 dev_err(component->dev, "Invalid system clock frequency\n"); in max98088_dai2_hw_params()
1063 snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, in max98088_dai2_hw_params()
1065 snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, in max98088_dai2_hw_params()
1071 snd_soc_component_update_bits(component, M98088_REG_20_DAI2_FILTERS, in max98088_dai2_hw_params()
1074 snd_soc_component_update_bits(component, M98088_REG_20_DAI2_FILTERS, in max98088_dai2_hw_params()
1077 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, M98088_SHDNRUN, in max98088_dai2_hw_params()
1086 struct snd_soc_component *component = dai->component; in max98088_dai_set_sysclk() local
1087 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai_set_sysclk()
1103 snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x10); in max98088_dai_set_sysclk()
1106 snd_soc_component_write(component, M98088_REG_10_SYS_CLK, 0x20); in max98088_dai_set_sysclk()
1109 dev_err(component->dev, "Invalid master clock frequency\n"); in max98088_dai_set_sysclk()
1113 if (snd_soc_component_read(component, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) { in max98088_dai_set_sysclk()
1114 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, in max98088_dai_set_sysclk()
1116 snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS, in max98088_dai_set_sysclk()
1129 struct snd_soc_component *component = codec_dai->component; in max98088_dai1_set_fmt() local
1130 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai1_set_fmt()
1143 snd_soc_component_write(component, M98088_REG_12_DAI1_CLKCFG_HI, in max98088_dai1_set_fmt()
1145 snd_soc_component_write(component, M98088_REG_13_DAI1_CLKCFG_LO, in max98088_dai1_set_fmt()
1153 dev_err(component->dev, "Clock mode unsupported"); in max98088_dai1_set_fmt()
1183 snd_soc_component_update_bits(component, M98088_REG_14_DAI1_FORMAT, in max98088_dai1_set_fmt()
1190 snd_soc_component_write(component, M98088_REG_15_DAI1_CLOCK, reg15val); in max98088_dai1_set_fmt()
1199 struct snd_soc_component *component = codec_dai->component; in max98088_dai2_set_fmt() local
1200 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_dai2_set_fmt()
1212 snd_soc_component_write(component, M98088_REG_1A_DAI2_CLKCFG_HI, in max98088_dai2_set_fmt()
1214 snd_soc_component_write(component, M98088_REG_1B_DAI2_CLKCFG_LO, in max98088_dai2_set_fmt()
1222 dev_err(component->dev, "Clock mode unsupported"); in max98088_dai2_set_fmt()
1252 snd_soc_component_update_bits(component, M98088_REG_1C_DAI2_FORMAT, in max98088_dai2_set_fmt()
1256 snd_soc_component_write(component, M98088_REG_1D_DAI2_CLOCK, in max98088_dai2_set_fmt()
1266 struct snd_soc_component *component = codec_dai->component; in max98088_dai1_mute() local
1274 snd_soc_component_update_bits(component, M98088_REG_2F_LVL_DAI1_PLAY, in max98088_dai1_mute()
1282 struct snd_soc_component *component = codec_dai->component; in max98088_dai2_mute() local
1290 snd_soc_component_update_bits(component, M98088_REG_31_LVL_DAI2_PLAY, in max98088_dai2_mute()
1295 static int max98088_set_bias_level(struct snd_soc_component *component, in max98088_set_bias_level() argument
1298 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_set_bias_level()
1314 if (snd_soc_component_get_bias_level(component) == in max98088_set_bias_level()
1326 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) in max98088_set_bias_level()
1329 snd_soc_component_update_bits(component, M98088_REG_4C_PWR_EN_IN, in max98088_set_bias_level()
1334 snd_soc_component_update_bits(component, M98088_REG_4C_PWR_EN_IN, in max98088_set_bias_level()
1395 static int max98088_get_channel(struct snd_soc_component *component, const char *name) in max98088_get_channel() argument
1401 dev_err(component->dev, "Bad EQ channel name '%s'\n", name); in max98088_get_channel()
1405 static void max98088_setup_eq1(struct snd_soc_component *component) in max98088_setup_eq1() argument
1407 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_setup_eq1()
1432 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", in max98088_setup_eq1()
1437 save = snd_soc_component_read(component, M98088_REG_49_CFG_LEVEL); in max98088_setup_eq1()
1438 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, 0); in max98088_setup_eq1()
1442 m98088_eq_band(component, 0, 0, coef_set->band1); in max98088_setup_eq1()
1443 m98088_eq_band(component, 0, 1, coef_set->band2); in max98088_setup_eq1()
1444 m98088_eq_band(component, 0, 2, coef_set->band3); in max98088_setup_eq1()
1445 m98088_eq_band(component, 0, 3, coef_set->band4); in max98088_setup_eq1()
1446 m98088_eq_band(component, 0, 4, coef_set->band5); in max98088_setup_eq1()
1449 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, save); in max98088_setup_eq1()
1452 static void max98088_setup_eq2(struct snd_soc_component *component) in max98088_setup_eq2() argument
1454 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_setup_eq2()
1479 dev_dbg(component->dev, "Selected %s/%dHz for %dHz sample rate\n", in max98088_setup_eq2()
1484 save = snd_soc_component_read(component, M98088_REG_49_CFG_LEVEL); in max98088_setup_eq2()
1485 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, 0); in max98088_setup_eq2()
1489 m98088_eq_band(component, 1, 0, coef_set->band1); in max98088_setup_eq2()
1490 m98088_eq_band(component, 1, 1, coef_set->band2); in max98088_setup_eq2()
1491 m98088_eq_band(component, 1, 2, coef_set->band3); in max98088_setup_eq2()
1492 m98088_eq_band(component, 1, 3, coef_set->band4); in max98088_setup_eq2()
1493 m98088_eq_band(component, 1, 4, coef_set->band5); in max98088_setup_eq2()
1496 snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, in max98088_setup_eq2()
1503 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_put_eq_enum() local
1504 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_put_eq_enum()
1506 int channel = max98088_get_channel(component, kcontrol->id.name); in max98088_put_eq_enum()
1522 max98088_setup_eq1(component); in max98088_put_eq_enum()
1525 max98088_setup_eq2(component); in max98088_put_eq_enum()
1535 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); in max98088_get_eq_enum() local
1536 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_get_eq_enum()
1537 int channel = max98088_get_channel(component, kcontrol->id.name); in max98088_get_eq_enum()
1548 static void max98088_handle_eq_pdata(struct snd_soc_component *component) in max98088_handle_eq_pdata() argument
1550 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_handle_eq_pdata()
1603 ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls)); in max98088_handle_eq_pdata()
1605 dev_err(component->dev, "Failed to add EQ control: %d\n", ret); in max98088_handle_eq_pdata()
1608 static void max98088_handle_pdata(struct snd_soc_component *component) in max98088_handle_pdata() argument
1610 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_handle_pdata()
1615 dev_dbg(component->dev, "No platform data\n"); in max98088_handle_pdata()
1628 snd_soc_component_write(component, M98088_REG_48_CFG_MIC, regval); in max98088_handle_pdata()
1632 snd_soc_component_update_bits(component, M98088_REG_2A_MIC_REC_CNTL, in max98088_handle_pdata()
1637 max98088_handle_eq_pdata(component); in max98088_handle_pdata()
1640 static int max98088_probe(struct snd_soc_component *component) in max98088_probe() argument
1642 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_probe()
1670 ret = snd_soc_component_read(component, M98088_REG_FF_REV_ID); in max98088_probe()
1672 dev_err(component->dev, "Failed to read device revision: %d\n", in max98088_probe()
1676 dev_info(component->dev, "revision %c\n", ret - 0x40 + 'A'); in max98088_probe()
1678 snd_soc_component_write(component, M98088_REG_51_PWR_SYS, M98088_PWRSV); in max98088_probe()
1680 snd_soc_component_write(component, M98088_REG_0F_IRQ_ENABLE, 0x00); in max98088_probe()
1682 snd_soc_component_write(component, M98088_REG_22_MIX_DAC, in max98088_probe()
1686 snd_soc_component_write(component, M98088_REG_4E_BIAS_CNTL, 0xF0); in max98088_probe()
1687 snd_soc_component_write(component, M98088_REG_50_DAC_BIAS2, 0x0F); in max98088_probe()
1689 snd_soc_component_write(component, M98088_REG_16_DAI1_IOCFG, in max98088_probe()
1692 snd_soc_component_write(component, M98088_REG_1E_DAI2_IOCFG, in max98088_probe()
1695 max98088_handle_pdata(component); in max98088_probe()
1701 static void max98088_remove(struct snd_soc_component *component) in max98088_remove() argument
1703 struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); in max98088_remove()