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5 do not support them. One purpose of this document is therefore to
7 control dependencies also pose other challenges, which leads to the
8 second purpose of this document, namely to help you to avoid breaking
19 This is not guaranteed to provide any ordering because some types of CPUs
20 are permitted to predict the result of the load from "b". This prediction
21 can cause other CPUs to see this load as having happened before the load
43 the compiler might fuse the store to "b" with other stores. Worse yet,
48 Furthermore, if the compiler is able to prove that the value of variable
49 "a" is always non-zero, it would be well within its rights to optimize
56 In particular, although READ_ONCE() does force the compiler to emit a
57 load, it does *not* force the compiler to actually use the loaded value.
59 It is tempting to try use control dependencies to enforce ordering on
87 Now there is no conditional between the load from "a" and the store to
88 "b", which means that the CPU is within its rights to reorder them: The
115 The initial READ_ONCE() is still required to prevent the compiler from
118 But please note that you need to be careful what you do with the local
119 variable "q", otherwise the compiler might be able to guess the value
120 and again remove the conditional branch that is absolutely required to
132 If MAX is compile-time defined to be 1, then the compiler knows that
133 (q % MAX) must be equal to zero, regardless of the value of "q".
134 The compiler is therefore within its rights to transform the above code
141 Given this transformation, the CPU is not required to respect the ordering
142 between the load from variable "a" and the store to variable "b". It is
143 tempting to add a barrier(), but this does not help. The conditional
145 to relying on control dependencies to produce this ordering, you should
149 BUILD_BUG_ON(MAX <= 1); /* Order load from a with store to b. */
159 must store different values to "b". As in previous examples, if the two
179 does force the compiler to emit code for a given load, the compiler is
180 within its rights to discard the loaded value.
182 In addition, control dependencies apply only to the then-clause and
194 It is tempting to argue that there in fact is ordering because the
196 the writes to "b" with the condition. Unfortunately for this line
197 of reasoning, the compiler might compile the two writes to "b" as
208 The control dependencies would then extend only to the pair of cmov
211 "a" and the store to "c". In short, control dependencies provide ordering
212 only to the stores in the then-clause and else-clause of the "if" statement
214 to code following that "if" statement.
226 (*) If both legs of the "if" statement contain identical stores to
229 smp_store_release(). Please note that it is *not* sufficient to use
238 to optimize the conditional away, it will have also optimized
240 can help to preserve the needed conditional.
244 atomic{,64}_read() can help to preserve your control dependency.
246 (*) Control dependencies apply only to the then-clause and else-clause
249 do *not* apply to code beyond the end of that "if" statement.
254 need all the CPUs to agree on the ordering of a given store against
258 your job to ensure that they do not break your code.