Lines Matching refs:reg1
267 if (!has_reg_type(state, dst->reg1)) in update_insn_state_x86()
270 tsr = &state->regs[dst->reg1]; in update_insn_state_x86()
275 else if (has_reg_type(state, src->reg1) && in update_insn_state_x86()
276 state->regs[src->reg1].kind == TSR_KIND_CONST) in update_insn_state_x86()
277 imm_value = state->regs[src->reg1].imm_value; in update_insn_state_x86()
278 else if (src->reg1 == DWARF_REG_PC) { in update_insn_state_x86()
308 insn_offset, imm_value, dst->reg1); in update_insn_state_x86()
327 if (!has_reg_type(state, dst->reg1)) in update_insn_state_x86()
330 tsr = &state->regs[dst->reg1]; in update_insn_state_x86()
351 insn_offset, dst->reg1); in update_insn_state_x86()
367 insn_offset, var_addr, dst->reg1); in update_insn_state_x86()
378 insn_offset, tsr->imm_value, dst->reg1); in update_insn_state_x86()
382 if (!has_reg_type(state, src->reg1) || in update_insn_state_x86()
383 !state->regs[src->reg1].ok) { in update_insn_state_x86()
388 tsr->type = state->regs[src->reg1].type; in update_insn_state_x86()
389 tsr->kind = state->regs[src->reg1].kind; in update_insn_state_x86()
390 tsr->imm_value = state->regs[src->reg1].imm_value; in update_insn_state_x86()
395 tsr->copied_from = src->reg1; in update_insn_state_x86()
398 insn_offset, src->reg1, dst->reg1); in update_insn_state_x86()
403 int sreg = src->reg1; in update_insn_state_x86()
405 if (!has_reg_type(state, dst->reg1)) in update_insn_state_x86()
408 tsr = &state->regs[dst->reg1]; in update_insn_state_x86()
438 insn_offset, -offset, dst->reg1); in update_insn_state_x86()
441 insn_offset, offset, sreg, dst->reg1); in update_insn_state_x86()
455 insn_offset, src->offset, sreg, dst->reg1); in update_insn_state_x86()
479 insn_offset, addr, dst->reg1); in update_insn_state_x86()
490 int reg2 = (sreg == src->reg1) ? src->reg2 : src->reg1; in update_insn_state_x86()
511 insn_offset, src->offset, src->reg1, in update_insn_state_x86()
512 src->reg2, dst->reg1); in update_insn_state_x86()
515 insn_offset, src->offset, sreg, dst->reg1); in update_insn_state_x86()
532 insn_offset, src->offset, sreg, dst->reg1); in update_insn_state_x86()
536 else if (src->multi_regs && sreg == src->reg1 && in update_insn_state_x86()
537 src->reg1 != src->reg2) { in update_insn_state_x86()
554 insn_offset, dst->reg1); in update_insn_state_x86()
564 if (!has_reg_type(state, src->reg1) || in update_insn_state_x86()
565 !state->regs[src->reg1].ok) in update_insn_state_x86()
569 if (dst->reg1 == fbreg || dst->reg1 == state->stack_reg) { in update_insn_state_x86()
573 tsr = &state->regs[src->reg1]; in update_insn_state_x86()
592 if (dst->reg1 == fbreg) { in update_insn_state_x86()
594 insn_offset, src->reg1, -offset); in update_insn_state_x86()
597 insn_offset, src->reg1, offset, dst->reg1); in update_insn_state_x86()