Lines Matching refs:src
217 struct annotated_op_loc *src = &loc.ops[INSN_OP_SOURCE]; in update_insn_state_x86() local
273 if (src->imm) in update_insn_state_x86()
274 imm_value = src->offset; in update_insn_state_x86()
275 else if (has_reg_type(state, src->reg1) && in update_insn_state_x86()
276 state->regs[src->reg1].kind == TSR_KIND_CONST) in update_insn_state_x86()
277 imm_value = state->regs[src->reg1].imm_value; in update_insn_state_x86()
278 else if (src->reg1 == DWARF_REG_PC) { in update_insn_state_x86()
280 src->offset, dl); in update_insn_state_x86()
326 if (!src->mem_ref && !dst->mem_ref) { in update_insn_state_x86()
334 src->segment == INSN_SEG_X86_GS && src->imm) { in update_insn_state_x86()
344 var_addr = src->offset; in update_insn_state_x86()
372 if (src->imm) { in update_insn_state_x86()
374 tsr->imm_value = src->offset; in update_insn_state_x86()
382 if (!has_reg_type(state, src->reg1) || in update_insn_state_x86()
383 !state->regs[src->reg1].ok) { in update_insn_state_x86()
388 tsr->type = state->regs[src->reg1].type; in update_insn_state_x86()
389 tsr->kind = state->regs[src->reg1].kind; in update_insn_state_x86()
390 tsr->imm_value = state->regs[src->reg1].imm_value; in update_insn_state_x86()
395 tsr->copied_from = src->reg1; in update_insn_state_x86()
398 insn_offset, src->reg1, dst->reg1); in update_insn_state_x86()
402 if (src->mem_ref && !dst->mem_ref) { in update_insn_state_x86()
403 int sreg = src->reg1; in update_insn_state_x86()
415 int offset = src->offset - fboff; in update_insn_state_x86()
449 src->offset, &type_die)) { in update_insn_state_x86()
455 insn_offset, src->offset, sreg, dst->reg1); in update_insn_state_x86()
465 addr = annotate_calc_pcrel(ms, ip, src->offset, dl); in update_insn_state_x86()
486 u64 var_addr = src->offset; in update_insn_state_x86()
489 if (src->multi_regs) { in update_insn_state_x86()
490 int reg2 = (sreg == src->reg1) ? src->reg2 : src->reg1; in update_insn_state_x86()
509 if (src->multi_regs) { in update_insn_state_x86()
511 insn_offset, src->offset, src->reg1, in update_insn_state_x86()
512 src->reg2, dst->reg1); in update_insn_state_x86()
515 insn_offset, src->offset, sreg, dst->reg1); in update_insn_state_x86()
526 src->offset, &type_die)) { in update_insn_state_x86()
532 insn_offset, src->offset, sreg, dst->reg1); in update_insn_state_x86()
536 else if (src->multi_regs && sreg == src->reg1 && in update_insn_state_x86()
537 src->reg1 != src->reg2) { in update_insn_state_x86()
538 sreg = src->reg2; in update_insn_state_x86()
546 if (src->offset < 0) { in update_insn_state_x86()
547 if (get_global_var_info(dloc, (s64)src->offset, in update_insn_state_x86()
563 if (!src->mem_ref && dst->mem_ref) { in update_insn_state_x86()
564 if (!has_reg_type(state, src->reg1) || in update_insn_state_x86()
565 !state->regs[src->reg1].ok) in update_insn_state_x86()
573 tsr = &state->regs[src->reg1]; in update_insn_state_x86()
594 insn_offset, src->reg1, -offset); in update_insn_state_x86()
597 insn_offset, src->reg1, offset, dst->reg1); in update_insn_state_x86()