Lines Matching refs:reg
25 static void pr_ibs_fetch_ctl(union ibs_fetch_ctl reg) in pr_ibs_fetch_ctl() argument
52 if (reg.phy_addr_valid) in pr_ibs_fetch_ctl()
53 l1tlb_pgsz_str = l1tlb_pgsz_strs_erratum1347[reg.l1tlb_pgsz]; in pr_ibs_fetch_ctl()
55 if (reg.phy_addr_valid) in pr_ibs_fetch_ctl()
56 l1tlb_pgsz_str = l1tlb_pgsz_strs[reg.l1tlb_pgsz]; in pr_ibs_fetch_ctl()
57 ic_miss_str = ic_miss_strs[reg.ic_miss]; in pr_ibs_fetch_ctl()
63 reg.l3_miss_only, reg.fetch_oc_miss, reg.fetch_l3_miss); in pr_ibs_fetch_ctl()
68 reg.val, reg.fetch_maxcnt << 4, reg.fetch_cnt << 4, reg.fetch_lat, in pr_ibs_fetch_ctl()
69 reg.fetch_en, reg.fetch_val, reg.fetch_comp, ic_miss_str ? : "", in pr_ibs_fetch_ctl()
70 reg.phy_addr_valid, l1tlb_pgsz_str ? : "", reg.l1tlb_miss, reg.l2tlb_miss, in pr_ibs_fetch_ctl()
71 reg.rand_en, reg.fetch_comp ? (reg.fetch_l2_miss ? " L2Miss 1" : " L2Miss 0") : "", in pr_ibs_fetch_ctl()
75 static void pr_ic_ibs_extd_ctl(union ic_ibs_extd_ctl reg) in pr_ic_ibs_extd_ctl() argument
77 printf("ic_ibs_ext_ctl:\t%016llx IbsItlbRefillLat %3d\n", reg.val, reg.itlb_refill_lat); in pr_ic_ibs_extd_ctl()
80 static void pr_ibs_op_ctl(union ibs_op_ctl reg) in pr_ibs_op_ctl() argument
86 snprintf(l3_miss_only, sizeof(l3_miss_only), " L3MissOnly %d", reg.l3_miss_only); in pr_ibs_op_ctl()
90 reg.ldlat_thrsh, reg.ldlat_en); in pr_ibs_op_ctl()
94 reg.val, ((reg.opmaxcnt_ext << 16) | reg.opmaxcnt) << 4, l3_miss_only, in pr_ibs_op_ctl()
95 reg.op_en, reg.op_val, reg.cnt_ctl, in pr_ibs_op_ctl()
96 reg.cnt_ctl ? "uOps" : "cycles", reg.opcurcnt, ldlat); in pr_ibs_op_ctl()
99 static void pr_ibs_op_data(union ibs_op_data reg) in pr_ibs_op_data() argument
103 reg.val, reg.comp_to_ret_ctr, reg.tag_to_ret_ctr, in pr_ibs_op_data()
104 reg.op_brn_ret ? (reg.op_return ? " OpReturn 1" : " OpReturn 0") : "", in pr_ibs_op_data()
105 reg.op_brn_ret ? (reg.op_brn_taken ? " OpBrnTaken 1" : " OpBrnTaken 0") : "", in pr_ibs_op_data()
106 reg.op_brn_ret ? (reg.op_brn_misp ? " OpBrnMisp 1" : " OpBrnMisp 0") : "", in pr_ibs_op_data()
107 reg.op_brn_ret, reg.op_rip_invalid, reg.op_brn_fuse, reg.op_microcode); in pr_ibs_op_data()
110 static void pr_ibs_op_data2_extended(union ibs_op_data2 reg) in pr_ibs_op_data2_extended() argument
128 int data_src = (reg.data_src_hi << 3) | reg.data_src_lo; in pr_ibs_op_data2_extended()
130 printf("ibs_op_data2:\t%016llx %sRmtNode %d%s\n", reg.val, in pr_ibs_op_data2_extended()
132 (reg.cache_hit_st ? "CacheHitSt 1=O-State " : "CacheHitSt 0=M-state ") : "", in pr_ibs_op_data2_extended()
133 reg.rmt_node, in pr_ibs_op_data2_extended()
137 static void pr_ibs_op_data2_default(union ibs_op_data2 reg) in pr_ibs_op_data2_default() argument
150 printf("ibs_op_data2:\t%016llx %sRmtNode %d%s\n", reg.val, in pr_ibs_op_data2_default()
151 reg.data_src_lo == 2 ? (reg.cache_hit_st ? "CacheHitSt 1=O-State " in pr_ibs_op_data2_default()
153 reg.rmt_node, data_src_str[reg.data_src_lo]); in pr_ibs_op_data2_default()
156 static void pr_ibs_op_data2(union ibs_op_data2 reg) in pr_ibs_op_data2() argument
159 return pr_ibs_op_data2_extended(reg); in pr_ibs_op_data2()
160 pr_ibs_op_data2_default(reg); in pr_ibs_op_data2()
163 static void pr_ibs_op_data3(union ibs_op_data3 reg) in pr_ibs_op_data3() argument
184 if (!(cpu_family == 0x19 && cpu_model < 0x10 && (reg.dc_miss_no_mab_alloc || reg.sw_pf))) { in pr_ibs_op_data3()
185 snprintf(l2_miss_str, sizeof(l2_miss_str), " L2Miss %d", reg.l2_miss); in pr_ibs_op_data3()
187 " OpDcMissOpenMemReqs %2d", reg.op_dc_miss_open_mem_reqs); in pr_ibs_op_data3()
190 if (reg.op_mem_width) in pr_ibs_op_data3()
192 " OpMemWidth %2d bytes", 1 << (reg.op_mem_width - 1)); in pr_ibs_op_data3()
195 if (reg.dc_phy_addr_valid) { in pr_ibs_op_data3()
196 int idx = (reg.dc_l1tlb_hit_1g << 1) | reg.dc_l1tlb_hit_2m; in pr_ibs_op_data3()
200 reg.dc_l1tlb_miss, reg.dc_l2tlb_miss); in pr_ibs_op_data3()
207 reg.dc_l1tlb_miss, reg.dc_l2tlb_miss); in pr_ibs_op_data3()
210 reg.dc_l1tlb_hit_2m, reg.dc_l1tlb_hit_1g); in pr_ibs_op_data3()
212 " DcL2TlbHit2M %d", reg.dc_l2tlb_hit_2m); in pr_ibs_op_data3()
214 " DcL2TlbHit1G %d", reg.dc_l2_tlb_hit_1g); in pr_ibs_op_data3()
221 reg.val, reg.ld_op, reg.st_op, dc_l1_l2tlb_miss_str, in pr_ibs_op_data3()
223 dc_l2tlb_hit_2m_str, reg.dc_miss, reg.dc_mis_acc, reg.dc_wc_mem_acc, in pr_ibs_op_data3()
224 reg.dc_uc_mem_acc, reg.dc_locked_op, reg.dc_miss_no_mab_alloc, in pr_ibs_op_data3()
225 reg.dc_lin_addr_valid, reg.dc_phy_addr_valid, dc_l2tlb_hit_1g_str, in pr_ibs_op_data3()
226 l2_miss_str, reg.sw_pf, op_mem_width_str, op_dc_miss_open_mem_reqs_str, in pr_ibs_op_data3()
227 reg.dc_miss_lat, reg.tlb_refill_lat); in pr_ibs_op_data3()