| /arch/mips/fw/arc/ |
| A D | file.c | 16 ArcRead(ULONG FileID, VOID *Buffer, ULONG N, ULONG *Count) in ArcRead()
22 ArcWrite(ULONG FileID, PVOID Buffer, ULONG N, PULONG Count) in ArcWrite()
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| /arch/alpha/include/asm/ |
| A D | switch_to.h | 9 #define switch_to(P,N,L) \ argument
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| A D | core_cia.h | 205 #define CIA_IOC_PCI_Wn_BASE(N) (IDENT_ADDR + 0x8760000400UL + (N)*0x100) argument
206 #define CIA_IOC_PCI_Wn_MASK(N) (IDENT_ADDR + 0x8760000440UL + (N)*0x100) argument
207 #define CIA_IOC_PCI_Tn_BASE(N) (IDENT_ADDR + 0x8760000480UL + (N)*0x100) argument
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| /arch/sparc/crypto/ |
| A D | camellia_asm.S | 76 #define ROTL128(S01, S23, TMP1, TMP2, N) \ argument
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| /arch/loongarch/include/asm/ |
| A D | hw_breakpoint.h | 57 #define LOONGARCH_CSR_WATCH_READ(N, REG, T, VAL) \ argument
65 #define LOONGARCH_CSR_WATCH_WRITE(N, REG, T, VAL) \ argument
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| /arch/arm64/include/asm/ |
| A D | hw_breakpoint.h | 98 #define AARCH64_DBG_READ(N, REG, VAL) do {\ argument
102 #define AARCH64_DBG_WRITE(N, REG, VAL) do {\ argument
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| /arch/arm/include/asm/ |
| A D | hw_breakpoint.h | 110 #define ARM_DBG_READ(N, M, OP2, VAL) do {\ argument
114 #define ARM_DBG_WRITE(N, M, OP2, VAL) do {\ argument
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| /arch/sh/math-emu/ |
| A D | math.c | 70 #define CMP_X(SZ,R,M,N) do{ \ argument
74 #define EQ_X(SZ,R,M,N) do{ \ argument
101 #define ARITH_X(SZ,OP,M,N) do{ \ argument
287 #define EMU_FLOAT_X(SZ,N) do { \ in NOTYETn() argument
303 #define EMU_FTRC_X(SZ,N) do { \ argument
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| /arch/m68k/fpsp040/ |
| A D | stan.S | 158 .set N,L_SCR3 define
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| A D | stwotox.S | 175 .set N,L_SCR1 define
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| A D | ssin.S | 143 .set N,L_SCR2 define
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| /arch/mips/include/asm/mips-boards/ |
| A D | bonito64.h | 351 #define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N))) argument
352 #define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N))) argument
353 #define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N))) argument
372 #define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N))) argument
373 #define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N))) argument
374 #define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N))) argument
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| /arch/sparc/include/asm/ |
| A D | head_64.h | 12 #define GET_GL_GLOBAL(N) \ argument
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| /arch/mips/lib/ |
| A D | memset.S | 129 #define STORE_BYTE(N) \ argument
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| A D | memcpy.S | 501 #define COPY_BYTE(N) \ argument
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| A D | csum_partial.S | 671 #define COPY_BYTE(N) \ argument
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| /arch/mips/include/asm/mach-loongson64/ |
| A D | loongson.h | 215 #define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N))) argument
216 #define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N))) argument
217 #define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N))) argument
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| /arch/mips/include/asm/mach-loongson2ef/ |
| A D | loongson.h | 204 #define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N))) argument
205 #define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N))) argument
206 #define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N))) argument
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| /arch/loongarch/kernel/ |
| A D | hw_breakpoint.c | 36 #define READ_WB_REG_CASE(OFF, N, REG, T, VAL) \ argument
41 #define WRITE_WB_REG_CASE(OFF, N, REG, T, VAL) \ argument
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| /arch/mips/include/asm/mach-au1x00/ |
| A D | au1000.h | 275 #define MEM_SDMODE_RS_N(N) ((N) << 18) argument
281 #define MEM_SDMODE_CS_N(N) ((N) << 15) argument
282 #define MEM_SDMODE_TRAS_N(N) ((N) << 11) argument
283 #define MEM_SDMODE_TMRD_N(N) ((N) << 9) argument
284 #define MEM_SDMODE_TWR_N(N) ((N) << 7) argument
285 #define MEM_SDMODE_TRP_N(N) ((N) << 5) argument
286 #define MEM_SDMODE_TRCD_N(N) ((N) << 3) argument
287 #define MEM_SDMODE_TCL_N(N) ((N) << 0) argument
293 #define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) argument
301 #define MEM_SDREFCFG_TRC_N(N) ((N) << MEM_SDREFCFG_TRC) argument
[all …]
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| /arch/arm64/kernel/ |
| A D | hw_breakpoint.c | 61 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \ argument
66 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \ argument
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| /arch/mips/cavium-octeon/ |
| A D | octeon-memcpy.S | 360 #define COPY_BYTE(N) \ argument
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| /arch/openrisc/include/asm/ |
| A D | spr_defs.h | 108 #define SPR_DVR(N) (SPRGROUP_D + (N)) argument
109 #define SPR_DCR(N) (SPRGROUP_D + 8 + (N)) argument
118 #define SPR_PCCR(N) (SPRGROUP_PC + (N)) argument
119 #define SPR_PCMR(N) (SPRGROUP_PC + 8 + (N)) argument
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| /arch/x86/math-emu/ |
| A D | fpu_trig.c | 882 int exp_1, N; in do_fprem() local
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| /arch/arm/probes/kprobes/ |
| A D | test-core.h | 440 #define N(val) (val ^ 0xffffffff) macro
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