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Searched defs:PIPE_CONTROL_STATE_CACHE_INVALIDATE (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/xe/instructions/
A Dxe_gpu_commands.h67 #define PIPE_CONTROL_STATE_CACHE_INVALIDATE (1<<2) macro
/drivers/gpu/drm/i915/gt/
A Dintel_gpu_commands.h316 #define PIPE_CONTROL_STATE_CACHE_INVALIDATE (1<<2) macro

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