| /drivers/net/ethernet/qlogic/qlcnic/ |
| A D | qlcnic_hdr.h | 641 #define QLC_DEV_SET_REF_CNT(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
642 #define QLC_DEV_CLR_REF_CNT(VAL, FN) ((VAL) &= ~(1 << (FN * 4))) argument
643 #define QLC_DEV_SET_RST_RDY(VAL, FN) ((VAL) |= (1 << (FN * 4))) argument
644 #define QLC_DEV_SET_QSCNT_RDY(VAL, FN) ((VAL) |= (2 << (FN * 4))) argument
645 #define QLC_DEV_CLR_RST_QSCNT(VAL, FN) ((VAL) &= ~(3 << (FN * 4))) argument
647 #define QLC_DEV_GET_DRV(VAL, FN) (0xf & ((VAL) >> (FN * 4))) argument
648 #define QLC_DEV_SET_DRV(VAL, FN) ((VAL) << (FN * 4)) argument
678 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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| A D | qlcnic_83xx_hw.h | 405 #define QLC_83XX_GET_FUNC_PRIVILEGE(VAL, FN) (0x3 & ((VAL) >> (FN * 2))) argument
406 #define QLC_83XX_SET_FUNC_OPMODE(VAL, FN) ((VAL) << (FN * 2)) argument
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| A D | qlcnic.h | 880 #define QLCNIC_IS_LB_CONFIGURED(VAL) \ argument
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| /drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r570/nvrm/ |
| A D | msgfn.h | 12 # define E(RPC, VAL) NV_VGPU_MSG_EVENT_##RPC = VAL, argument
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| A D | rpcfn.h | 12 # define X(UNIT, RPC, VAL) NV_VGPU_MSG_FUNCTION_##RPC = VAL, argument
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| /drivers/net/ethernet/qlogic/netxen/ |
| A D | netxen_nic_hdr.h | 950 #define NETXEN_DIMM_MEMTYPE(VAL) ((VAL >> 3) & 0xf) argument
951 #define NETXEN_DIMM_NUMROWS(VAL) ((VAL >> 7) & 0xf) argument
952 #define NETXEN_DIMM_NUMCOLS(VAL) ((VAL >> 11) & 0xf) argument
953 #define NETXEN_DIMM_NUMRANKS(VAL) ((VAL >> 15) & 0x3) argument
954 #define NETXEN_DIMM_DATAWIDTH(VAL) ((VAL >> 18) & 0x3) argument
955 #define NETXEN_DIMM_NUMBANKS(VAL) ((VAL >> 21) & 0xf) argument
956 #define NETXEN_DIMM_TYPE(VAL) ((VAL >> 25) & 0x3f) argument
991 #define ISR_LEGACY_INT_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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| /drivers/net/ethernet/freescale/fs_enet/ |
| A D | mii-fec.c | 46 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
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| A D | mac-fcc.c | 68 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
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| /drivers/scsi/ |
| A D | sun3x_esp.c | 50 #define dma_write32(VAL, REG) \ argument
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| A D | mac_esp.c | 50 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG) argument
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| A D | sun_esp.c | 34 #define dma_write32(VAL, REG) \ argument
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| A D | aha152x.h | 289 #define SETPORT(PORT, VAL) outb( (VAL), (PORT) ) argument
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| A D | esp_scsi.c | 117 #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG) argument
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| /drivers/hwmon/ |
| A D | smsc47b397.c | 42 #define VAL 0x2f /* The value to read/write */ macro
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| A D | smsc47m1.c | 44 #define VAL 0x2f /* The value to read/write */ macro
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| /drivers/gpu/drm/panel/ |
| A D | panel-novatek-nt39016.c | 70 #define RV(REG, VAL) { .reg = (REG), .def = (VAL), .delay_us = 2 } argument
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| /drivers/watchdog/ |
| A D | it8712f_wdt.c | 57 #define VAL 0x2f /* The value to read/write */ macro
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| A D | it87_wdt.c | 44 #define VAL 0x2f macro
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| /drivers/gpio/ |
| A D | gpio-it87.c | 38 #define VAL 0x2f macro
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| /drivers/comedi/drivers/ |
| A D | s626.h | 447 #define S626_I2C_B2(ATTR, VAL) (((ATTR) << 6) | ((VAL) << 24)) argument
448 #define S626_I2C_B1(ATTR, VAL) (((ATTR) << 4) | ((VAL) << 16)) argument
449 #define S626_I2C_B0(ATTR, VAL) (((ATTR) << 2) | ((VAL) << 8)) argument
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| /drivers/pinctrl/ |
| A D | pinctrl-rockchip.c | 236 #define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG) \ argument
246 #define RK_MUXROUTE_SAME(ID, PIN, FUNC, REG, VAL) \ argument
249 #define RK_MUXROUTE_GRF(ID, PIN, FUNC, REG, VAL) \ argument
252 #define RK_MUXROUTE_PMU(ID, PIN, FUNC, REG, VAL) \ argument
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| /drivers/staging/rtl8723bs/hal/ |
| A D | HalPhyRf_8723B.c | 18 #define VAL 1 macro
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| /drivers/scsi/qla4xxx/ |
| A D | ql4_nx.h | 746 #define ISR_IS_LEGACY_INTR_IDLE(VAL) (((VAL) & 0x300) == 0) argument
747 #define ISR_IS_LEGACY_INTR_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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| /drivers/scsi/qla2xxx/ |
| A D | qla_nx.h | 708 #define ISR_IS_LEGACY_INTR_IDLE(VAL) (((VAL) & 0x300) == 0) argument
709 #define ISR_IS_LEGACY_INTR_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200) argument
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