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Searched defs:_table (Results 1 – 22 of 22) sorted by relevance

/drivers/clk/sprd/
A Dmux.h32 #define _SPRD_MUX_CLK(_shift, _width, _table) \ argument
39 #define SPRD_MUX_CLK_HW_INIT_FN(_struct, _name, _parents, _table, \ argument
51 #define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \ argument
62 #define SPRD_MUX_CLK_DATA_TABLE(_struct, _name, _parents, _table, \ argument
A Dcomposite.h21 #define SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \ argument
35 #define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table, \ argument
46 #define SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, _table, \ argument
61 _table, _mshift, _mwidth, \ argument
/drivers/clk/sunxi-ng/
A Dccu_div.h43 #define _SUNXI_CCU_DIV_TABLE_FLAGS(_shift, _width, _table, _flags) \ argument
51 #define _SUNXI_CCU_DIV_TABLE(_shift, _width, _table) \ argument
89 _table, _gate, _flags) \ argument
106 _table, _flags) \ argument
113 _table, _flags) \ argument
128 _parents, _table, \ argument
147 _parents, _table, \ argument
A Dccu_mux.h32 #define _SUNXI_CCU_MUX_TABLE(_shift, _width, _table) \ argument
49 #define SUNXI_CCU_MUX_TABLE_WITH_GATE_FEAT(_struct, _name, _parents, _table, \ argument
66 _table, _reg, _shift, \ argument
73 #define SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, _table, \ argument
A Dccu_sdm.h41 #define _SUNXI_CCU_SDM(_table, _enable, \ argument
/drivers/clk/actions/
A Dowl-pll.h42 _width, _min_mul, _max_mul, _delay, _table) \ argument
56 _shift, _width, _min_mul, _max_mul, _table, _flags) \ argument
71 _shift, _width, _min_mul, _max_mul, _table, _flags) \ argument
85 _shift, _width, _min_mul, _max_mul, _delay, _table, \ argument
A Dowl-divider.h29 #define OWL_DIVIDER_HW(_reg, _shift, _width, _div_flags, _table) \ argument
39 _shift, _width, _table, _div_flags, _flags) \ argument
A Dowl-factor.h35 #define OWL_FACTOR_HW(_reg, _shift, _width, _fct_flags, _table) \ argument
45 _shift, _width, _table, _fct_flags, _flags) \ argument
/drivers/clk/spacemit/
A Dccu_pll.h49 #define CCU_PLL_CONFIG(_table, _reg_lock, _mask_lock) \ argument
66 #define CCU_PLL_DEFINE(_name, _table, _reg_swcr1, _reg_swcr3, _reg_lock, \ argument
/drivers/iio/health/
A Dafe440x.h117 #define AFE440X_TABLE_ATTR(_name, _table) \ argument
145 #define AFE440X_ATTR(_name, _field, _table) \ argument
/drivers/clk/nxp/
A Dclk-lpc18xx-cgu.c169 #define LPC1XX_CGU_SRC_CLK_DIV(_id, _width, _table) \ argument
203 #define LPC1XX_CGU_BASE_CLK(_id, _table, _flags) \ argument
268 #define LPC1XX_CGU_CLK_PLL(_id, _table, _pll_ops) \ argument
A Dclk-lpc32xx.c1109 #define LPC32XX_DEFINE_MUX(_idx, _reg, _shift, _mask, _table, _flags) \ argument
1130 #define LPC32XX_DEFINE_DIV(_idx, _reg, _shift, _width, _table, _flags) \ argument
/drivers/net/ethernet/sfc/
A Dmae.c1897 #define TABLE_POPULATE_KEY_IPV4(dst, _table, _field, _value) \ argument
1902 #define TABLE_POPULATE_KEY(dst, _table, _field, _value) \ argument
1908 #define TABLE_POPULATE_RESP_BOOL(dst, _table, _field, _value) \ argument
1913 #define TABLE_POPULATE_RESP(dst, _table, _field, _value) \ argument
1919 #define TABLE_POPULATE_RESP_U24(dst, _table, _field, _value) \ argument
/drivers/regulator/
A Dbcm590xx-regulator.c90 #define BCM590XX_LDO_DESC(_model, _model_lower, _name, _name_lower, _table) \ argument
115 #define BCM59056_LDO_DESC(_name, _name_lower, _table) \ argument
122 #define BCM59054_LDO_DESC(_name, _name_lower, _table) \ argument
A Dmax8998.c491 #define MAX8998_CURRENT_REG(_name, _ops, _table, _reg, _mask) \ argument
/drivers/clk/mvebu/
A Darmada-37xx-periph.c159 #define PERIPH_DIV(_name, _reg, _shift, _table) \ argument
186 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
191 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
/drivers/clk/
A Dclk-loongson1.c178 _table, _bypass_shift, _bypass_inv, _flags) \ argument
A Dclk-bm1880.c144 _div_shift, _div_width, _div_initval, _table, \ argument
184 _table, _flags) { \ argument
/drivers/clk/at91/
A Dpmc.h125 #define PMC_INIT_TABLE(_table, _count) \ argument
/drivers/clk/microchip/
A Dclk-mpfs.c223 #define CLK_CFG(_id, _name, _parent, _shift, _width, _table, _flags, _offset) { \ argument
/drivers/clk/tegra/
A Dclk.h644 _gate_flags, _table, _lock) \ argument
687 _clk_num, _gate_flags, _clk_id, _table, \ argument
/drivers/clk/stm32/
A Dclk-stm32mp13.c290 #define CFG_DIV(_id, _offset, _shift, _width, _flags, _table, _ready)\ argument

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