1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 #ifndef __LINUX_GPIO_GENERIC_H
4 #define __LINUX_GPIO_GENERIC_H
5 
6 #include <linux/cleanup.h>
7 #include <linux/gpio/driver.h>
8 #include <linux/spinlock.h>
9 
10 struct device;
11 
12 /**
13  * struct gpio_generic_chip_config - Generic GPIO chip configuration data
14  * @dev: Parent device of the new GPIO chip (compulsory).
15  * @sz: Size (width) of the MMIO registers in bytes, typically 1, 2 or 4.
16  * @dat: MMIO address for the register to READ the value of the GPIO lines, it
17  *       is expected that a 1 in the corresponding bit in this register means
18  *       the line is asserted.
19  * @set: MMIO address for the register to SET the value of the GPIO lines, it
20  *       is expected that we write the line with 1 in this register to drive
21  *       the GPIO line high.
22  * @clr: MMIO address for the register to CLEAR the value of the GPIO lines,
23  *       it is expected that we write the line with 1 in this register to
24  *       drive the GPIO line low. It is allowed to leave this address as NULL,
25  *       in that case the SET register will be assumed to also clear the GPIO
26  *       lines, by actively writing the line with 0.
27  * @dirout: MMIO address for the register to set the line as OUTPUT. It is
28  *          assumed that setting a line to 1 in this register will turn that
29  *          line into an output line. Conversely, setting the line to 0 will
30  *          turn that line into an input.
31  * @dirin: MMIO address for the register to set this line as INPUT. It is
32  *         assumed that setting a line to 1 in this register will turn that
33  *         line into an input line. Conversely, setting the line to 0 will
34  *         turn that line into an output.
35  * @flags: Different flags that will affect the behaviour of the device, such
36  *         as endianness etc.
37  */
38 struct gpio_generic_chip_config {
39 	struct device *dev;
40 	unsigned long sz;
41 	void __iomem *dat;
42 	void __iomem *set;
43 	void __iomem *clr;
44 	void __iomem *dirout;
45 	void __iomem *dirin;
46 	unsigned long flags;
47 };
48 
49 /**
50  * struct gpio_generic_chip - Generic GPIO chip implementation.
51  * @gc: The underlying struct gpio_chip object, implementing low-level GPIO
52  *      chip routines.
53  */
54 struct gpio_generic_chip {
55 	struct gpio_chip gc;
56 };
57 
58 /**
59  * gpio_generic_chip_init() - Initialize a generic GPIO chip.
60  * @chip: Generic GPIO chip to set up.
61  * @cfg: Generic GPIO chip configuration.
62  *
63  * Returns 0 on success, negative error number on failure.
64  */
65 static inline int
gpio_generic_chip_init(struct gpio_generic_chip * chip,const struct gpio_generic_chip_config * cfg)66 gpio_generic_chip_init(struct gpio_generic_chip *chip,
67 		       const struct gpio_generic_chip_config *cfg)
68 {
69 	return bgpio_init(&chip->gc, cfg->dev, cfg->sz, cfg->dat, cfg->set,
70 			  cfg->clr, cfg->dirout, cfg->dirin, cfg->flags);
71 }
72 
73 /**
74  * gpio_generic_chip_set() - Set the GPIO line value of the generic GPIO chip.
75  * @chip: Generic GPIO chip to use.
76  * @offset: Hardware offset of the line to set.
77  * @value: New GPIO line value.
78  *
79  * Some modules using the generic GPIO chip, need to set line values in their
80  * direction setters but they don't have access to the gpio-mmio symbols so
81  * they use the function pointer in struct gpio_chip directly. This is not
82  * optimal and can lead to crashes at run-time in some instances. This wrapper
83  * provides a safe interface for users.
84  *
85  * Returns: 0 on success, negative error number of failure.
86  */
87 static inline int
gpio_generic_chip_set(struct gpio_generic_chip * chip,unsigned int offset,int value)88 gpio_generic_chip_set(struct gpio_generic_chip *chip, unsigned int offset,
89 		      int value)
90 {
91 	if (WARN_ON(!chip->gc.set))
92 		return -EOPNOTSUPP;
93 
94 	return chip->gc.set(&chip->gc, offset, value);
95 }
96 
97 #define gpio_generic_chip_lock(gen_gc) \
98 	raw_spin_lock(&(gen_gc)->gc.bgpio_lock)
99 
100 #define gpio_generic_chip_unlock(gen_gc) \
101 	raw_spin_unlock(&(gen_gc)->gc.bgpio_lock)
102 
103 #define gpio_generic_chip_lock_irqsave(gen_gc, flags) \
104 	raw_spin_lock_irqsave(&(gen_gc)->gc.bgpio_lock, flags)
105 
106 #define gpio_generic_chip_unlock_irqrestore(gen_gc, flags) \
107 	raw_spin_unlock_irqrestore(&(gen_gc)->gc.bgpio_lock, flags)
108 
109 DEFINE_LOCK_GUARD_1(gpio_generic_lock,
110 		    struct gpio_generic_chip,
111 		    gpio_generic_chip_lock(_T->lock),
112 		    gpio_generic_chip_unlock(_T->lock))
113 
114 DEFINE_LOCK_GUARD_1(gpio_generic_lock_irqsave,
115 		    struct gpio_generic_chip,
116 		    gpio_generic_chip_lock_irqsave(_T->lock, _T->flags),
117 		    gpio_generic_chip_unlock_irqrestore(_T->lock, _T->flags),
118 		    unsigned long flags)
119 
120 #endif /* __LINUX_GPIO_GENERIC_H */
121