| /drivers/dpll/ |
| A D | dpll_netlink.c | 237 struct dpll_device *dpll = ref->dpll; in dpll_msg_add_pin_prio() local
259 struct dpll_device *dpll = ref->dpll; in dpll_msg_add_pin_on_dpll_state() local
281 struct dpll_device *dpll = ref->dpll; in dpll_msg_add_pin_direction() local
301 struct dpll_device *dpll = ref->dpll; in dpll_msg_add_pin_phase_adjust() local
849 struct dpll_device *dpll; in dpll_pin_freq_set() local
914 struct dpll_device *dpll; in dpll_pin_esync_set() local
994 struct dpll_device *dpll; in dpll_pin_ref_sync_state_set() local
1215 struct dpll_device *dpll; in dpll_pin_phase_adj_set() local
1288 struct dpll_device *dpll; in dpll_pin_parent_device_set() local
1681 struct dpll_device *dpll; in dpll_nl_device_id_get_doit() local
[all …]
|
| A D | dpll_core.c | 154 dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll, in dpll_xa_ref_dpll_add()
245 struct dpll_device *dpll; in dpll_device_alloc() local
284 struct dpll_device *dpll, *ret = NULL; in dpll_device_get() local
313 void dpll_device_put(struct dpll_device *dpll) in dpll_device_put()
329 dpll_device_registration_find(struct dpll_device *dpll, in dpll_device_registration_find()
410 void dpll_device_unregister(struct dpll_device *dpll, in dpll_device_unregister()
609 __dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, in __dpll_pin_register()
643 dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin, in dpll_pin_register()
832 dpll_device_registration_first(struct dpll_device *dpll) in dpll_device_registration_first()
842 void *dpll_priv(struct dpll_device *dpll) in dpll_priv()
[all …]
|
| A D | dpll_core.h | 74 struct dpll_device *dpll; member
|
| /drivers/net/ethernet/intel/ice/ |
| A D | ice_dpll.c | 933 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_output_state_set()
968 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_input_state_set()
1042 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_output_state_get()
1068 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_input_state_get()
1240 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_sw_pin_state_get()
1358 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_input_prio_get()
1390 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_input_prio_set()
1465 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_input_direction()
1690 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_input_phase_adjust_set()
1968 const struct dpll_device *dpll, void *dpll_priv, in ice_dpll_input_esync_set()
[all …]
|
| /drivers/dpll/zl3073x/ |
| A D | dpll.c | 44 struct zl3073x_dpll *dpll; member
158 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_esync_get()
224 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_esync_set()
518 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_phase_offset_get()
594 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_phase_adjust_get()
634 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_phase_adjust_set()
823 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_state_on_dpll_get()
836 const struct dpll_device *dpll, in zl3073x_dpll_input_pin_state_on_dpll_set()
946 const struct dpll_device *dpll, in zl3073x_dpll_output_pin_esync_get()
1061 const struct dpll_device *dpll, in zl3073x_dpll_output_pin_esync_set()
[all …]
|
| /drivers/net/ethernet/mellanox/mlx5/core/ |
| A D | dpll.c | 11 struct dpll_device *dpll; member
144 mlx5_dpll_device_lock_status_get(const struct dpll_device *dpll, void *priv, in mlx5_dpll_device_lock_status_get()
161 static int mlx5_dpll_device_mode_get(const struct dpll_device *dpll, in mlx5_dpll_device_mode_get()
198 static int mlx5_dpll_clock_quality_level_get(const struct dpll_device *dpll, in mlx5_dpll_clock_quality_level_get()
257 const struct dpll_device *dpll, in mlx5_dpll_pin_direction_get()
268 const struct dpll_device *dpll, in mlx5_dpll_state_on_dpll_get()
286 const struct dpll_device *dpll, in mlx5_dpll_state_on_dpll_set()
300 const struct dpll_device *dpll, void *dpll_priv, in mlx5_dpll_ffo_get()
|
| /drivers/gpu/drm/i915/display/ |
| A D | intel_dpll.c | 331 static u32 i9xx_dpll_compute_m(const struct dpll *dpll) in i9xx_dpll_compute_m()
428 u32 dpll = hw_state->dpll; in i9xx_crtc_clock_get() local
987 u32 i9xx_dpll_compute_fp(const struct dpll *dpll) in i9xx_dpll_compute_fp()
992 static u32 pnv_dpll_compute_fp(const struct dpll *dpll) in pnv_dpll_compute_fp()
1007 u32 dpll; in i9xx_dpll() local
1097 u32 dpll; in i8xx_dpll() local
1250 static bool ilk_needs_fb_cb_tune(const struct dpll *dpll, int factor) in ilk_needs_fb_cb_tune()
1271 u32 dpll; in ilk_dpll() local
1424 u32 dpll; in vlv_dpll() local
1450 u32 dpll; in chv_dpll() local
[all …]
|
| A D | intel_display_types.h | 579 struct dpll { struct
602 bool dpll_set, modeset; argument
1086 struct dpll dpll; member
|
| /drivers/gpu/drm/gma500/ |
| A D | psb_intel_display.c | 107 u32 dpll = 0, fp = 0, dspcntr, pipeconf; in psb_intel_crtc_mode_set() local
310 u32 dpll; in psb_intel_crtc_clock_get() local
|
| A D | cdv_intel_display.c | 584 u32 dpll = 0, dspcntr, pipeconf; in cdv_intel_crtc_mode_set() local
842 u32 dpll; in cdv_intel_crtc_clock_get() local
|
| /drivers/ata/ |
| A D | pata_hpt3x2n.c | 312 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); in hpt3x2n_qc_defer() local
328 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); in hpt3x2n_qc_issue() local
|
| /drivers/clk/rockchip/ |
| A D | clk-rv1108.c | 19 apll, dpll, gpll, enumerator
|
| A D | clk-rk3036.c | 21 apll, dpll, gpll, enumerator
|
| A D | clk-rk3328.c | 21 apll, dpll, cpll, gpll, npll, enumerator
|
| A D | clk-rk3228.c | 19 apll, dpll, cpll, gpll, enumerator
|
| A D | clk-rk3562.c | 22 apll, gpll, vpll, hpll, cpll, dpll, enumerator
|
| A D | clk-rk3308.c | 18 apll, dpll, vpll0, vpll1, enumerator
|
| A D | clk-rk3128.c | 18 apll, dpll, cpll, gpll, enumerator
|
| A D | clk-px30.c | 18 apll, dpll, cpll, npll, apll_b_h, apll_b_l, enumerator
|
| A D | clk-rk3368.c | 17 apllb, aplll, dpll, cpll, gpll, npll, enumerator
|
| A D | clk-rk3528.c | 24 apll, cpll, gpll, ppll, dpll, enumerator
|
| A D | clk-rv1126.c | 28 apll, dpll, cpll, hpll, enumerator
|
| A D | clk-rk3288.c | 24 apll, dpll, cpll, gpll, npll, enumerator
|
| A D | clk-rk3399.c | 19 lpll, bpll, dpll, cpll, gpll, npll, vpll, enumerator
|
| /drivers/gpu/drm/renesas/rcar-du/ |
| A D | rcar_du_crtc.c | 83 struct dpll_info *dpll, in rcar_du_dpll_divider()
217 struct dpll_info dpll = { 0 }; in rcar_du_crtc_set_display_timing() local
|