Home
last modified time | relevance | path

Searched defs:slice (Results 1 – 25 of 39) sorted by relevance

12

/drivers/net/ethernet/ti/icssg/
A Dicssg_classifier.c74 #define RX_CLASS_N_REG(slice, n, reg) \ argument
80 #define RX_CLASS_GATES_N_REG(slice, n) \ argument
205 static void rx_class_ft1_set_start_len(struct regmap *miig_rt, int slice, in rx_class_ft1_set_start_len()
215 static void rx_class_ft1_set_da(struct regmap *miig_rt, int slice, in rx_class_ft1_set_da()
227 static void rx_class_ft1_set_da_mask(struct regmap *miig_rt, int slice, in rx_class_ft1_set_da_mask()
259 static void rx_class_set_and(struct regmap *miig_rt, int slice, int n, in rx_class_set_and()
268 static void rx_class_set_or(struct regmap *miig_rt, int slice, int n, in rx_class_set_or()
277 static u32 rx_class_get_or(struct regmap *miig_rt, int slice, int n) in rx_class_get_or()
324 void icssg_class_disable(struct regmap *miig_rt, int slice) in icssg_class_disable()
398 void icssg_class_promiscuous_sr1(struct regmap *miig_rt, int slice) in icssg_class_promiscuous_sr1()
[all …]
A Dicssg_config.c140 int slice = prueth_emac_slice(emac); in icssg_config_mii_init() local
165 static void icssg_miig_queues_init(struct prueth *prueth, int slice) in icssg_miig_queues_init()
226 int slice = prueth_emac_slice(emac); in icssg_config_ipg() local
286 int slice = prueth_emac_slice(emac); in prueth_fw_offload_buffer_setup() local
373 int slice = prueth_emac_slice(emac); in prueth_emac_buffer_setup() local
502 int icssg_config(struct prueth *prueth, struct prueth_emac *emac, int slice) in icssg_config()
661 int slice = prueth_emac_slice(emac); in icssg_send_fdb_msg() local
695 int slice = prueth_emac_slice(emac); in icssg_fdb_setup() local
838 int slice = prueth_emac_slice(emac); in emac_fdb_flow_id_updated() local
A Dicssg_prueth_sr1.c55 int slice) in icssg_config_sr1()
157 int slice = prueth_emac_slice(emac); in icssg_config_set_speed_sr1() local
415 int slice, ret; in prueth_emac_start() local
452 int slice; in prueth_emac_stop() local
485 int slice = prueth_emac_slice(emac); in emac_ndo_open() local
723 int slice = prueth_emac_slice(emac); in emac_ndo_set_rx_mode_sr1() local
A Dicssg_prueth.c59 int slice = prueth_emac_slice(emac); in emac_get_tx_ts() local
149 int ret, slice; in prueth_emac_start() local
197 int slice; in prueth_emac_stop() local
210 int slice; in prueth_emac_common_start() local
706 int slice = prueth_emac_slice(emac); in emac_ndo_open() local
A Dicssg_common.c295 int ret, slice, i; in prueth_init_tx_chns() local
374 int i, ret = 0, slice; in prueth_init_rx_chns() local
1421 int prueth_get_cores(struct prueth *prueth, int slice, bool is_sr1) in prueth_get_cores()
1472 void prueth_put_cores(struct prueth *prueth, int slice) in prueth_put_cores()
A Dicssg_stats.c22 int slice = prueth_emac_slice(emac); in emac_update_hardware_stats() local
A Dicssg_mii_cfg.c48 int slice = prueth_emac_slice(emac); in icssg_update_rgmii_cfg() local
/drivers/staging/media/sunxi/cedrus/
A Dcedrus_vp8.c526 const struct v4l2_ctrl_vp8_frame *slice) in cedrus_read_header()
594 static void cedrus_vp8_update_probs(const struct v4l2_ctrl_vp8_frame *slice, in cedrus_vp8_update_probs()
656 const struct v4l2_ctrl_vp8_frame *slice = run->vp8.frame_params; in cedrus_vp8_setup() local
A Dcedrus_h264.c237 const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params; in cedrus_write_ref_list0() local
248 const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params; in cedrus_write_ref_list1() local
345 const struct v4l2_ctrl_h264_slice_params *slice = run->h264.slice_params; in cedrus_set_params() local
/drivers/gpu/drm/i915/
A Di915_sysfs.c68 int slice = (int)(uintptr_t)attr->private; in i915_l3_read() local
96 int slice = (int)(uintptr_t)attr->private; in i915_l3_write() local
/drivers/misc/eeprom/
A Dmax6875.c54 static void max6875_update_slice(struct i2c_client *client, int slice) in max6875_update_slice()
112 int slice, max_slice; in max6875_read() local
/drivers/accel/qaic/
A Dqaic_data.c161 struct bo_slice *slice = container_of(kref, struct bo_slice, ref_count); in free_slice() local
255 static int encode_reqs(struct qaic_device *qdev, struct bo_slice *slice, in encode_reqs()
394 struct bo_slice *slice; in qaic_map_one_slice() local
908 struct bo_slice *slice, *temp; in qaic_free_slices_bo() local
1074 static inline int copy_exec_reqs(struct qaic_device *qdev, struct bo_slice *slice, u32 dbc_id, in copy_exec_reqs()
1103 static inline int copy_partial_exec_reqs(struct qaic_device *qdev, struct bo_slice *slice, in copy_partial_exec_reqs()
1177 struct bo_slice *slice; in send_bo_list_to_device() local
/drivers/gpu/drm/i915/gt/
A Dintel_sseu.c38 intel_sseu_get_hsw_subslices(const struct sseu_dev_info *sseu, u8 slice) in intel_sseu_get_hsw_subslices()
47 static u16 sseu_get_eus(const struct sseu_dev_info *sseu, int slice, in sseu_get_eus()
58 static void sseu_set_eus(struct sseu_dev_info *sseu, int slice, int subslice, in sseu_set_eus()
A Dintel_gt_regs.h71 #define GEN8_MCR_SLICE(slice) (((slice) & 3) << 26) argument
76 #define GEN11_MCR_SLICE(slice) (((slice) & 0xf) << 27) argument
453 #define GEN9_IZ_HASHING_MASK(slice) (0x3 << ((slice) * 2)) argument
454 #define GEN9_IZ_HASHING(slice, val) ((val) << ((slice) * 2)) argument
514 #define GEN9_SLICE_PGCTL_ACK(slice) _MMIO(0x804c + (slice) * 0x4) argument
518 #define GEN10_SLICE_PGCTL_ACK(slice) _MMIO(0x804c + ((slice) / 3) * 0x34 + \ argument
522 #define GEN9_SS01_EU_PGCTL_ACK(slice) _MMIO(0x805c + (slice) * 0x8) argument
523 #define GEN10_SS01_EU_PGCTL_ACK(slice) _MMIO(0x805c + ((slice) / 3) * 0x30 + \ argument
525 #define GEN9_SS23_EU_PGCTL_ACK(slice) _MMIO(0x8060 + (slice) * 0x8) argument
609 #define GEN9_EU_DISABLE(slice) _MMIO(0x9134 + (slice) * 0x4) argument
[all …]
A Dintel_workarounds.c1118 unsigned int slice, subslice; in gen9_wa_init_mcr() local
1246 unsigned int slice, unsigned int subslice) in __set_mcr_steering()
1266 unsigned int slice, unsigned int subslice) in __add_mcr_wa()
1311 unsigned long slice, subslice = 0, slice_mask = 0; in xehp_init_mcr() local
A Dintel_sseu.h122 intel_sseu_has_subslice(const struct sseu_dev_info *sseu, int slice, in intel_sseu_has_subslice()
/drivers/hte/
A Dhte-tegra194.c109 int slice; member
459 u32 slice, sl_bit_shift, line_bit, val, reg; in tegra_hte_en_dis_common() local
603 u32 tsh, tsl, src, pv, cv, acv, slice, bit_index, line_id; in tegra_hte_read_fifo() local
/drivers/gpu/drm/nouveau/nvkm/subdev/ltc/
A Dgm107.c110 const u32 slice = nvkm_rd32(device, 0x17e280) >> 28; in gm107_ltc_oneinit() local
A Dgf100.c213 const u32 slice = nvkm_rd32(device, 0x17e8dc) >> 28; in gf100_ltc_oneinit() local
/drivers/gpu/drm/i915/display/
A Dskl_watermark_regs.h58 #define DBUF_CTL_S(slice) _MMIO(_PICK(slice, \ argument
A Dintel_display_power.c1067 enum dbuf_slice slice, bool enable) in gen9_dbuf_slice_set()
1088 enum dbuf_slice slice; in gen9_dbuf_slices_update() local
1142 enum dbuf_slice slice; in gen12_dbuf_slices_config() local
/drivers/gpu/drm/radeon/
A Devergreen_cs.c399 unsigned pitch, slice, mslice; in evergreen_cs_track_validate_cb() local
566 unsigned pitch, slice, mslice; in evergreen_cs_track_validate_stencil() local
663 unsigned pitch, slice, mslice; in evergreen_cs_track_validate_depth() local
/drivers/net/ethernet/myricom/myri10ge/
A Dmyri10ge.c1796 int slice; in myri10ge_get_ethtool_stats() local
1943 int i, slice, status; in myri10ge_allocate_rings() local
2231 static int myri10ge_get_txrx(struct myri10ge_priv *mgp, int slice) in myri10ge_get_txrx()
2265 static int myri10ge_set_stats(struct myri10ge_priv *mgp, int slice) in myri10ge_set_stats()
2299 int i, status, big_pow2, slice; in myri10ge_open() local
3346 int slice = ss - mgp->ss; in myri10ge_check_slice() local
/drivers/crypto/intel/qat/qat_common/
A Dadf_tl_debugfs.h42 #define ADF_TL_SLICE_REG_OFF(slice, reg, qat_gen) \ argument
/drivers/hid/surface-hid/
A Dsurface_hid.c45 struct surface_hid_buffer_slice *slice; in ssam_hid_get_descriptor() local

Completed in 68 milliseconds

12