1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (c) 2023 MediaTek Inc.
4 * Author: Yunfei Dong <yunfei.dong@mediatek.com>
5 */
6
7 #ifndef _MTK_VCODEC_DEC_DRV_H_
8 #define _MTK_VCODEC_DEC_DRV_H_
9
10 #include "../common/mtk_vcodec_cmn_drv.h"
11 #include "../common/mtk_vcodec_dbgfs.h"
12 #include "../common/mtk_vcodec_fw_priv.h"
13 #include "../common/mtk_vcodec_util.h"
14 #include "vdec_msg_queue.h"
15
16 #define MTK_VCODEC_DEC_NAME "mtk-vcodec-dec"
17
18 #define IS_VDEC_LAT_ARCH(hw_arch) ((hw_arch) >= MTK_VDEC_LAT_SINGLE_CORE)
19 #define IS_VDEC_INNER_RACING(capability) ((capability) & MTK_VCODEC_INNER_RACING)
20 #define IS_VDEC_SUPPORT_EXT(capability) ((capability) & MTK_VDEC_IS_SUPPORT_EXT)
21
22 enum mtk_vcodec_dec_chip_name {
23 MTK_VDEC_INVAL = 0,
24 MTK_VDEC_MT8173 = 8173,
25 MTK_VDEC_MT8183 = 8183,
26 MTK_VDEC_MT8186 = 8186,
27 MTK_VDEC_MT8188 = 8188,
28 MTK_VDEC_MT8192 = 8192,
29 MTK_VDEC_MT8195 = 8195,
30 };
31
32 /*
33 * enum mtk_vdec_format_types - Structure used to get supported
34 * format types according to decoder capability
35 */
36 enum mtk_vdec_format_types {
37 MTK_VDEC_FORMAT_MM21 = 0x20,
38 MTK_VDEC_FORMAT_MT21C = 0x40,
39 MTK_VDEC_FORMAT_H264_SLICE = 0x100,
40 MTK_VDEC_FORMAT_VP8_FRAME = 0x200,
41 MTK_VDEC_FORMAT_VP9_FRAME = 0x400,
42 MTK_VDEC_FORMAT_AV1_FRAME = 0x800,
43 MTK_VDEC_FORMAT_HEVC_FRAME = 0x1000,
44 MTK_VCODEC_INNER_RACING = 0x20000,
45 MTK_VDEC_IS_SUPPORT_10BIT = 0x40000,
46 MTK_VDEC_IS_SUPPORT_EXT = 0x80000,
47 };
48
49 /*
50 * enum mtk_vdec_hw_count - Supported hardware count
51 */
52 enum mtk_vdec_hw_count {
53 MTK_VDEC_NO_HW = 0,
54 MTK_VDEC_ONE_CORE,
55 MTK_VDEC_ONE_LAT_ONE_CORE,
56 MTK_VDEC_MAX_HW_COUNT,
57 };
58
59 /*
60 * enum mtk_vdec_hw_arch - Used to separate different hardware architecture
61 */
62 enum mtk_vdec_hw_arch {
63 MTK_VDEC_PURE_SINGLE_CORE,
64 MTK_VDEC_LAT_SINGLE_CORE,
65 };
66
67 /**
68 * struct vdec_pic_info - picture size information
69 * @pic_w: picture width
70 * @pic_h: picture height
71 * @buf_w: picture buffer width (64 aligned up from pic_w)
72 * @buf_h: picture buffer height (64 aligned up from pic_h)
73 * @fb_sz: bitstream size of each plane
74 * E.g. suppose picture size is 176x144,
75 * buffer size will be aligned to 176x160.
76 * @cap_fourcc: fourcc number(may change on a resolution change)
77 * @reserved: align struct to 64-bit in order to adjust 32-bit and 64-bit os.
78 */
79 struct vdec_pic_info {
80 unsigned int pic_w;
81 unsigned int pic_h;
82 unsigned int buf_w;
83 unsigned int buf_h;
84 unsigned int fb_sz[VIDEO_MAX_PLANES];
85 unsigned int cap_fourcc;
86 unsigned int reserved;
87 };
88
89 /**
90 * struct mtk_vcodec_dec_pdata - compatible data for each IC
91 * @init_vdec_params: init vdec params
92 * @ctrls_setup: init vcodec dec ctrls
93 * @worker: worker to start a decode job
94 * @flush_decoder: function that flushes the decoder
95 * @get_cap_buffer: get capture buffer from capture queue
96 * @cap_to_disp: put capture buffer to disp list for lat and core arch
97 * @vdec_vb2_ops: struct vb2_ops
98 *
99 * @vdec_formats: supported video decoder formats
100 * @num_formats: count of video decoder formats
101 * @default_out_fmt: default output buffer format
102 * @default_cap_fmt: default capture buffer format
103 *
104 * @hw_arch: hardware arch is used to separate pure_sin_core and lat_sin_core
105 *
106 * @is_subdev_supported: whether support parent-node architecture(subdev)
107 * @uses_stateless_api: whether the decoder uses the stateless API with requests
108 */
109 struct mtk_vcodec_dec_pdata {
110 void (*init_vdec_params)(struct mtk_vcodec_dec_ctx *ctx);
111 int (*ctrls_setup)(struct mtk_vcodec_dec_ctx *ctx);
112 void (*worker)(struct work_struct *work);
113 int (*flush_decoder)(struct mtk_vcodec_dec_ctx *ctx);
114 struct vdec_fb *(*get_cap_buffer)(struct mtk_vcodec_dec_ctx *ctx);
115 void (*cap_to_disp)(struct mtk_vcodec_dec_ctx *ctx, int error,
116 struct media_request *src_buf_req);
117
118 const struct vb2_ops *vdec_vb2_ops;
119
120 const struct mtk_video_fmt *vdec_formats;
121 const int *num_formats;
122 const struct mtk_video_fmt *default_out_fmt;
123 const struct mtk_video_fmt *default_cap_fmt;
124
125 enum mtk_vdec_hw_arch hw_arch;
126
127 bool is_subdev_supported;
128 bool uses_stateless_api;
129 };
130
131 /**
132 * struct mtk_vcodec_dec_ctx - Context (instance) private data.
133 *
134 * @type: type of decoder instance
135 * @dev: pointer to the mtk_vcodec_dec_dev of the device
136 * @list: link to ctx_list of mtk_vcodec_dec_dev
137 *
138 * @fh: struct v4l2_fh
139 * @m2m_ctx: pointer to the v4l2_m2m_ctx of the context
140 * @q_data: store information of input and output queue of the context
141 * @id: index of the context that this structure describes
142 * @state: state of the context
143 *
144 * @dec_if: hooked decoder driver interface
145 * @drv_handle: driver handle for specific decode/encode instance
146 *
147 * @picinfo: store picture info after header parsing
148 * @dpb_size: store dpb count after header parsing
149 *
150 * @int_cond: variable used by the waitqueue
151 * @int_type: type of the last interrupt
152 * @queue: waitqueue that can be used to wait for this context to finish
153 * @irq_status: irq status
154 *
155 * @ctrl_hdl: handler for v4l2 framework
156 * @decode_work: worker for the decoding
157 * @last_decoded_picinfo: pic information get from latest decode
158 * @empty_flush_buf: a fake size-0 capture buffer that indicates flush. Used
159 * for stateful decoder.
160 * @is_flushing: set to true if flushing is in progress.
161 *
162 * @current_codec: current set input codec, in V4L2 pixel format
163 * @capture_fourcc: capture queue type in V4L2 pixel format
164 *
165 * @colorspace: enum v4l2_colorspace; supplemental to pixelformat
166 * @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
167 * @quantization: enum v4l2_quantization, colorspace quantization
168 * @xfer_func: enum v4l2_xfer_func, colorspace transfer function
169 *
170 * @decoded_frame_cnt: number of decoded frames
171 * @lock: protect variables accessed by V4L2 threads and worker thread such as
172 * mtk_video_dec_buf.
173 * @hw_id: hardware index used to identify different hardware.
174 *
175 * @msg_queue: msg queue used to store lat buffer information.
176 * @vpu_inst: vpu instance pointer.
177 *
178 * @is_10bit_bitstream: set to true if it's 10bit bitstream
179 */
180 struct mtk_vcodec_dec_ctx {
181 enum mtk_instance_type type;
182 struct mtk_vcodec_dec_dev *dev;
183 struct list_head list;
184
185 struct v4l2_fh fh;
186 struct v4l2_m2m_ctx *m2m_ctx;
187 struct mtk_q_data q_data[2];
188 int id;
189 enum mtk_instance_state state;
190
191 const struct vdec_common_if *dec_if;
192 void *drv_handle;
193
194 struct vdec_pic_info picinfo;
195 int dpb_size;
196
197 int int_cond[MTK_VDEC_HW_MAX];
198 int int_type[MTK_VDEC_HW_MAX];
199 wait_queue_head_t queue[MTK_VDEC_HW_MAX];
200 unsigned int irq_status;
201
202 struct v4l2_ctrl_handler ctrl_hdl;
203 struct work_struct decode_work;
204 struct vdec_pic_info last_decoded_picinfo;
205 struct v4l2_m2m_buffer empty_flush_buf;
206 bool is_flushing;
207
208 u32 current_codec;
209 u32 capture_fourcc;
210
211 enum v4l2_colorspace colorspace;
212 enum v4l2_ycbcr_encoding ycbcr_enc;
213 enum v4l2_quantization quantization;
214 enum v4l2_xfer_func xfer_func;
215
216 int decoded_frame_cnt;
217 struct mutex lock;
218 int hw_id;
219
220 struct vdec_msg_queue msg_queue;
221 void *vpu_inst;
222
223 bool is_10bit_bitstream;
224 };
225
226 /**
227 * struct mtk_vcodec_dec_dev - driver data
228 * @v4l2_dev: V4L2 device to register video devices for.
229 * @vfd_dec: Video device for decoder
230 * @mdev_dec: Media device for decoder
231 *
232 * @m2m_dev_dec: m2m device for decoder
233 * @plat_dev: platform device
234 * @ctx_list: list of struct mtk_vcodec_ctx
235 * @curr_ctx: The context that is waiting for codec hardware
236 *
237 * @reg_base: Mapped address of MTK Vcodec registers.
238 * @vdec_pdata: decoder IC-specific data
239 * @vdecsys_regmap: VDEC_SYS register space passed through syscon
240 *
241 * @fw_handler: used to communicate with the firmware.
242 * @id_counter: used to identify current opened instance
243 *
244 * @dec_mutex: decoder hardware lock
245 * @dev_mutex: video_device lock
246 * @dev_ctx_lock: the lock of context list
247 * @decode_workqueue: decode work queue
248 *
249 * @irqlock: protect data access by irq handler and work thread
250 * @dec_irq: decoder irq resource
251 *
252 * @pm: power management control
253 * @dec_capability: used to identify decode capability, ex: 4k
254 *
255 * @core_workqueue: queue used for core hardware decode
256 *
257 * @subdev_dev: subdev hardware device
258 * @subdev_prob_done: check whether all used hw device is prob done
259 * @subdev_bitmap: used to record hardware is ready or not
260 *
261 * @dec_active_cnt: used to mark whether need to record register value
262 * @vdec_racing_info: record register value
263 * @dec_racing_info_mutex: mutex lock used for inner racing mode
264 * @dbgfs: debug log related information
265 *
266 * @chip_name: used to distinguish platforms and select the correct codec configuration values
267 */
268 struct mtk_vcodec_dec_dev {
269 struct v4l2_device v4l2_dev;
270 struct video_device *vfd_dec;
271 struct media_device mdev_dec;
272
273 struct v4l2_m2m_dev *m2m_dev_dec;
274 struct platform_device *plat_dev;
275 struct list_head ctx_list;
276 struct mtk_vcodec_dec_ctx *curr_ctx;
277
278 void __iomem *reg_base[NUM_MAX_VCODEC_REG_BASE];
279 const struct mtk_vcodec_dec_pdata *vdec_pdata;
280 struct regmap *vdecsys_regmap;
281
282 struct mtk_vcodec_fw *fw_handler;
283 u64 id_counter;
284
285 /* decoder hardware mutex lock */
286 struct mutex dec_mutex[MTK_VDEC_HW_MAX];
287 struct mutex dev_mutex;
288 struct mutex dev_ctx_lock;
289 struct workqueue_struct *decode_workqueue;
290
291 spinlock_t irqlock;
292 int dec_irq;
293
294 struct mtk_vcodec_pm pm;
295 unsigned int dec_capability;
296
297 struct workqueue_struct *core_workqueue;
298
299 void *subdev_dev[MTK_VDEC_HW_MAX];
300 int (*subdev_prob_done)(struct mtk_vcodec_dec_dev *vdec_dev);
301 DECLARE_BITMAP(subdev_bitmap, MTK_VDEC_HW_MAX);
302
303 atomic_t dec_active_cnt;
304 u32 vdec_racing_info[132];
305 /* Protects access to vdec_racing_info data */
306 struct mutex dec_racing_info_mutex;
307 struct mtk_vcodec_dbgfs dbgfs;
308
309 enum mtk_vcodec_dec_chip_name chip_name;
310 };
311
fh_to_dec_ctx(struct v4l2_fh * fh)312 static inline struct mtk_vcodec_dec_ctx *fh_to_dec_ctx(struct v4l2_fh *fh)
313 {
314 return container_of(fh, struct mtk_vcodec_dec_ctx, fh);
315 }
316
ctrl_to_dec_ctx(struct v4l2_ctrl * ctrl)317 static inline struct mtk_vcodec_dec_ctx *ctrl_to_dec_ctx(struct v4l2_ctrl *ctrl)
318 {
319 return container_of(ctrl->handler, struct mtk_vcodec_dec_ctx, ctrl_hdl);
320 }
321
322 /* Wake up context wait_queue */
323 static inline void
wake_up_dec_ctx(struct mtk_vcodec_dec_ctx * ctx,unsigned int reason,unsigned int hw_id)324 wake_up_dec_ctx(struct mtk_vcodec_dec_ctx *ctx, unsigned int reason, unsigned int hw_id)
325 {
326 ctx->int_cond[hw_id] = 1;
327 ctx->int_type[hw_id] = reason;
328 wake_up_interruptible(&ctx->queue[hw_id]);
329 }
330
331 #define mtk_vdec_err(ctx, fmt, args...) \
332 mtk_vcodec_err((ctx)->id, (ctx)->dev->plat_dev, fmt, ##args)
333
334 #define mtk_vdec_debug(ctx, fmt, args...) \
335 mtk_vcodec_debug((ctx)->id, (ctx)->dev->plat_dev, fmt, ##args)
336
337 #define mtk_v4l2_vdec_err(ctx, fmt, args...) mtk_v4l2_err((ctx)->dev->plat_dev, fmt, ##args)
338
339 #define mtk_v4l2_vdec_dbg(level, ctx, fmt, args...) \
340 mtk_v4l2_debug((ctx)->dev->plat_dev, level, fmt, ##args)
341
342 #endif /* _MTK_VCODEC_DEC_DRV_H_ */
343