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Searched refs:ARCH_DMA_MINALIGN (Results 1 – 22 of 22) sorted by relevance

/arch/mips/include/asm/mach-ip32/
A Dkmalloc.h7 #define ARCH_DMA_MINALIGN 32 macro
9 #define ARCH_DMA_MINALIGN 128 macro
/arch/riscv/mm/
A Ddma-noncoherent.c15 int dma_cache_alignment __ro_after_init = ARCH_DMA_MINALIGN;
133 WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN, in arch_setup_dma_ops()
137 ARCH_DMA_MINALIGN, riscv_cbom_block_size); in arch_setup_dma_ops()
/arch/arm64/mm/
A Ddma-mapping.c45 WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN, in arch_setup_dma_ops()
49 ARCH_DMA_MINALIGN, cls); in arch_setup_dma_ops()
/arch/parisc/include/asm/
A Dcache.h24 #define ARCH_DMA_MINALIGN 128 macro
26 #define ARCH_DMA_MINALIGN 32 macro
/arch/arm/kernel/
A Dcacheinfo.c42 return cwg ? 4 << cwg : ARCH_DMA_MINALIGN; in cache_line_size_cp15()
44 return ARCH_DMA_MINALIGN; in cache_line_size_cp15()
58 return ARCH_DMA_MINALIGN; in cache_line_size()
/arch/arm64/include/asm/
A Dcache.h35 #define ARCH_DMA_MINALIGN (128) macro
83 return cwg ? 4 << cwg : ARCH_DMA_MINALIGN; in cache_line_size_of_cpu()
/arch/mips/include/asm/mach-n64/
A Dkmalloc.h6 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/mips/include/asm/mach-generic/
A Dkmalloc.h10 #define ARCH_DMA_MINALIGN 128 macro
/arch/mips/include/asm/mach-tx49xx/
A Dkmalloc.h5 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/m68k/include/asm/
A Dcache.h12 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/loongarch/include/asm/
A Dcache.h11 #define ARCH_DMA_MINALIGN (16) macro
/arch/microblaze/include/asm/
A Dcache.h22 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/hexagon/include/asm/
A Dcache.h15 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/arm/include/asm/
A Dcache.h18 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/riscv/include/asm/
A Dcache.h15 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/nios2/include/asm/
A Dcache.h21 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/sh/include/asm/
A Dcache.h21 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/xtensa/include/asm/
A Dcache.h32 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/csky/include/asm/
A Dcache.h11 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/arc/include/asm/
A Dcache.h52 #define ARCH_DMA_MINALIGN SMP_CACHE_BYTES macro
/arch/powerpc/include/asm/
A Dcache.h37 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES macro
/arch/arm64/kernel/
A Dcpufeature.c3936 ARCH_DMA_MINALIGN); in setup_system_features()

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