Searched refs:BASE (Results 1 – 8 of 8) sorted by relevance
| /arch/sparc/net/ |
| A D | bpf_jit_comp_32.c | 181 #define emit_loadptr(BASE, STRUCT, FIELD, DEST) \ argument
184 *prog++ = LDPTRI | RS1(BASE) | S13(_off) | RD(DEST); \
187 #define emit_load32(BASE, STRUCT, FIELD, DEST) \ argument
190 *prog++ = LD32I | RS1(BASE) | S13(_off) | RD(DEST); \
193 #define emit_load16(BASE, STRUCT, FIELD, DEST) \ argument
196 *prog++ = LD16I | RS1(BASE) | S13(_off) | RD(DEST); \
199 #define __emit_load8(BASE, STRUCT, FIELD, DEST) \ argument
201 *prog++ = LD8I | RS1(BASE) | S13(_off) | RD(DEST); \
204 #define emit_load8(BASE, STRUCT, FIELD, DEST) \ argument
206 __emit_load8(BASE, STRUCT, FIELD, DEST); \
[all …]
|
| /arch/sparc/kernel/ |
| A D | sun4v_tlb_miss.S | 11 #define LOAD_ITLB_INFO(BASE, VADDR, CTX) \ argument
12 ldx [BASE + HV_FAULT_I_ADDR_OFFSET], VADDR; \
13 ldx [BASE + HV_FAULT_I_CTX_OFFSET], CTX;
16 #define LOAD_DTLB_INFO(BASE, VADDR, CTX) \ argument
17 ldx [BASE + HV_FAULT_D_ADDR_OFFSET], VADDR; \
18 ldx [BASE + HV_FAULT_D_CTX_OFFSET], CTX;
|
| /arch/mips/include/asm/mips-boards/ |
| A D | bonito64.h | 411 #define BONITO_PCIMEMBASECFGBASE(WIN, BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBAS… argument
|
| /arch/microblaze/ |
| A D | Kconfig.platform | 37 BASE Address for kernel
|
| /arch/mips/kernel/ |
| A D | traps.c | 505 #define BASE 0x03e00000 macro
546 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_ll()
586 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); in simulate_sc()
717 #define RS BASE
|
| /arch/m68k/fpsp040/ |
| A D | slogn.S | 356 lea LOGTBL,%a0 | ...BASE ADDRESS OF 1/F AND LOG(F)
|
| /arch/arm64/tools/ |
| A D | sysreg | 5035 Field 63:12 BASE
|
| /arch/m68k/ifpsp060/src/ |
| A D | fplsp.S | 8253 lea LOGTBL(%pc),%a0 # BASE ADDRESS OF 1/F AND LOG(F)
|
Completed in 89 milliseconds