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Searched refs:CSR_DMW0_BASE (Results 1 – 4 of 4) sorted by relevance

/arch/loongarch/include/asm/
A Daddrspace.h29 #define IO_BASE CSR_DMW0_BASE
37 #define UNCACHE_BASE CSR_DMW0_BASE
A Defi.h21 #define EFI_RT_VIRTUAL_OFFSET CSR_DMW0_BASE
A Dloongarch.h906 #define CSR_DMW0_BASE (CSR_DMW0_VSEG << DMW_PABITS) macro
907 #define CSR_DMW0_INIT (CSR_DMW0_BASE | CSR_DMW0_PLV0)
/arch/loongarch/mm/
A Dcache.c47 uint64_t addr = CSR_DMW0_BASE; in flush_cache_leaf()

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