Searched refs:CSR_HSTATEEN0H (Results 1 – 2 of 2) sorted by relevance

/arch/riscv/kvm/
A D	vcpu.c	602 nacl_csr_write(nsh, CSR_HSTATEEN0H, cfg->hstateen0 >> 32); in kvm_arch_vcpu_load() 621 csr_write(CSR_HSTATEEN0H, cfg->hstateen0 >> 32); in kvm_arch_vcpu_load()
/arch/riscv/include/asm/
A D	csr.h	399 #define CSR_HSTATEEN0H 0x61c macro

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