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Searched refs:DCACHE_ALIAS_MASK (Results 1 – 2 of 2) sorted by relevance

/arch/xtensa/mm/
A Dcache.c71 (page_to_phys(page) & DCACHE_ALIAS_MASK); in kmap_invalidate_coherent()
85 return (void *)(base + (vaddr & DCACHE_ALIAS_MASK)); in coherent_kvaddr()
160 virt = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); in flush_dcache_folio()
163 virt = TLBTEMP_BASE_1 + (temp & DCACHE_ALIAS_MASK); in flush_dcache_folio()
205 unsigned long virt = TLBTEMP_BASE_1 + (address & DCACHE_ALIAS_MASK); in local_flush_cache_page()
241 tmp = TLBTEMP_BASE_1 + (phys & DCACHE_ALIAS_MASK); in update_mmu_cache_range()
243 tmp = TLBTEMP_BASE_1 + (addr & DCACHE_ALIAS_MASK); in update_mmu_cache_range()
283 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); in copy_to_user_page()
299 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); in copy_to_user_page()
326 unsigned long t = TLBTEMP_BASE_1 + (vaddr & DCACHE_ALIAS_MASK); in copy_from_user_page()
/arch/xtensa/include/asm/
A Dpage.h64 # define DCACHE_ALIAS_MASK (PAGE_MASK & (DCACHE_WAY_SIZE - 1)) macro
65 # define DCACHE_ALIAS(a) (((a) & DCACHE_ALIAS_MASK) >> PAGE_SHIFT)
66 # define DCACHE_ALIAS_EQ(a,b) ((((a) ^ (b)) & DCACHE_ALIAS_MASK) == 0)

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