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Searched refs:DEBUGCTLMSR_LBR (Results 1 – 8 of 8) sorted by relevance

/arch/x86/kvm/vmx/
A Dpmu_intel.c659 data &= ~DEBUGCTLMSR_LBR; in intel_pmu_legacy_freezing_lbrs_on_pmi()
733 if (vmx_guest_debugctl_read() & DEBUGCTLMSR_LBR) in vmx_passthrough_lbr_msrs()
755 if (!(vmx_guest_debugctl_read() & DEBUGCTLMSR_LBR)) in intel_pmu_cleanup()
A Dvmx.c2132 debugctl |= DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI; in vmx_get_supported_debugctl()
2146 if (invalid & (DEBUGCTLMSR_BTF | DEBUGCTLMSR_LBR)) { in vmx_is_valid_debugctl()
2148 invalid &= ~(DEBUGCTLMSR_BTF | DEBUGCTLMSR_LBR); in vmx_is_valid_debugctl()
2234 (data & DEBUGCTLMSR_LBR)) in vmx_set_msr()
/arch/x86/include/asm/
A Dmsr-index.h409 #define DEBUGCTLMSR_LBR (1UL << DEBUGCTLMSR_LBR_BIT) macro
/arch/x86/kvm/svm/
A Dsvm.h674 #define DEBUGCTL_RESERVED_BITS (~DEBUGCTLMSR_LBR)
A Dsvm.c910 bool enable_lbrv = (svm_get_lbr_vmcb(svm)->save.dbgctl & DEBUGCTLMSR_LBR) || in svm_update_lbrv()
/arch/x86/events/
A Dperf_event.h1592 debugctl &= ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI); in __intel_pmu_lbr_disable()
/arch/x86/events/intel/
A Dlbr.c146 debugctl |= DEBUGCTLMSR_LBR; in __intel_pmu_lbr_enable()
A Dcore.c3106 ~(DEBUGCTLMSR_FREEZE_LBRS_ON_PMI|DEBUGCTLMSR_LBR)); in intel_pmu_reset()

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