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Searched refs:ECFGF_SIP0 (Results 1 – 3 of 3) sorted by relevance

/arch/loongarch/kernel/
A Dirq.c125 set_csr_ecfg(ECFGF_SIP0 | ECFGF_IP0 | ECFGF_IP1 | ECFGF_IP2 | ECFGF_IPI | ECFGF_PMC); in init_IRQ()
A Dsmp.c405 ECFGF_IPI | ECFGF_PMC | ECFGF_TIMER | ECFGF_SIP0; in loongson_init_secondary()
/arch/loongarch/include/asm/
A Dloongarch.h1098 #define ECFGF_SIP0 (_ULCAST_(1) << ECFGB_SIP0) macro

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