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Searched refs:FPU_CSR_DIV_X (Results 1 – 5 of 5) sorted by relevance

/arch/loongarch/kernel/
A Dtraps.c461 else if (fcsr & FPU_CSR_DIV_X) in force_fcsr_sig()
/arch/loongarch/include/asm/
A Dloongarch.h1504 #define FPU_CSR_DIV_X 0x08000000 macro
/arch/mips/kernel/
A Dtraps.c780 else if (fcr31 & FPU_CSR_DIV_X) in force_fcr31_sig()
/arch/mips/include/asm/
A Dmipsregs.h1322 #define FPU_CSR_DIV_X 0x00008000 macro
/arch/mips/math-emu/
A Dcp1emu.c1956 rcsr |= FPU_CSR_DIV_X | FPU_CSR_DIV_S; in fpu_emu()

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