| /arch/arm64/boot/dts/bitmain/ |
| A D | bm1880-sophon-edge.dts | 12 * GPIO name legend: proper name = the GPIO line is used as GPIO 29 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L" 30 * are the only ones actually used for GPIO. 56 "GPIO-A", /* GPIO0, LSEC pin 23 */ 57 "GPIO-C", /* GPIO1, LSEC pin 25 */ 59 "GPIO-E", /* GPIO3, LSEC pin 27 */ 63 "GPIO-G", /* GPIO7, LSEC pin 29 */ 112 "GPIO-I", /* GPIO50, LSEC pin 31 */ 113 "GPIO-K", /* GPIO51, LSEC pin 33 */ 124 "GPIO-B", /* GPIO62, LSEC pin 24 */ [all …]
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| /arch/arm/boot/dts/hisilicon/ |
| A D | hi3620-hi4511.dts | 95 0x0f8 0x1 /* GPIO (IOMG61) */ 96 0x0fc 0x1 /* GPIO (IOMG62) */ 107 0x104 0x1 /* GPIO (IOMG96) */ 108 0x108 0x1 /* GPIO (IOMG64) */ 119 0x160 0x1 /* GPIO (IOMG85) */ 120 0x164 0x1 /* GPIO (IOMG86) */ 132 0x168 0x1 /* GPIO (IOMG87) */ 133 0x16c 0x1 /* GPIO (IOMG88) */ 134 0x170 0x1 /* GPIO (IOMG93) */ 144 0x0b4 0x1 /* GPIO (IOMG45) */ [all …]
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| /arch/arm64/boot/dts/hisilicon/ |
| A D | hi3798cv200-poplar.dts | 108 gpio-line-names = "GPIO-E", "", 110 "", "GPIO-F", 111 "", "GPIO-J"; 116 gpio-line-names = "GPIO-H", "GPIO-I", 117 "GPIO-L", "GPIO-G", 118 "GPIO-K", "", 126 "GPIO-C", "", 127 "", "GPIO-B"; 134 "", "GPIO-D", 142 "", "GPIO-A",
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| A D | hi3670-hikey970.dts | 59 * Legend: proper name = the GPIO line is used as GPIO 79 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 80 * ones actually used for GPIO. 103 "GPIO-I", /* LSEC pin 31: GPIO_013_CAM0_RST_N */ 111 "GPIO-G", /* LSEC pin 29: GPIO_016_LCD_TE0 */ 129 "GPIO-H", /* LSEC pin 30: GPIO_029_LCD_RST_N */ 131 "GPIO-L"; /* LSEC pin 34: GPIO_031 */ 137 "GPIO-K", /* LSEC pin 33: GPIO_032_CAM1_RST_N */ 172 "GPIO-D", /* LSEC pin 26 */ 173 "GPIO-J", /* LSEC pin 32 */ [all …]
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| A D | hi6220-hikey.dts | 117 /* WLAN_EN GPIO */ 348 * Legend: proper name = the GPIO line is used as GPIO 368 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 369 * ones actually used for GPIO. 384 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */ 385 "GPIO-B", /* LSEC Pin 24: GPIO2_1 */ 386 "GPIO-C", /* LSEC Pin 25: GPIO2_2 */ 387 "GPIO-D", /* LSEC Pin 26: GPIO2_3 */ 388 "GPIO-E", /* LSEC Pin 27: GPIO2_4 */ 390 "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */ [all …]
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| A D | hi3660-hikey960.dts | 80 label = "GPIO Power"; 203 * Legend: proper name = the GPIO line is used as GPIO 225 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 226 * ones actually used for GPIO. 257 "GPIO-J", /* LSEC pin 32: GPIO_019 */ 259 "GPIO-L", /* LSEC pin 34: GPIO_021 */ 261 "GPIO-G"; /* LSEC pin 29: LCD_TE0 */ 266 /* The rail from pin BK36 is named LCD_TE0, we assume to be muxed as GPIO for GPIO-G */ 492 "GPIO-A", /* LSEC pin 23: GPIO_208 */ 493 "GPIO-B", /* LSEC pin 24: GPIO_209 */ [all …]
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| /arch/arm/boot/dts/nxp/imx/ |
| A D | imx6ull-dhcom-pdk2.dts | 39 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; /* GPIO A */ 40 label = "TA1-GPIO-A"; 46 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; /* GPIO B */ 47 label = "TA2-GPIO-B"; 53 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ 54 label = "TA3-GPIO-C"; 60 gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; /* GPIO D */ 61 label = "TA4-GPIO-D"; 71 * Disable PDK2 LED5, because GPIO E is 92 * Disable PDK2 LED7, because GPIO H is [all …]
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| A D | imx6qdl-dhcom-pdk2.dtsi | 62 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */ 63 label = "TA1-GPIO-A"; 71 gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */ 72 label = "TA2-GPIO-B"; 80 gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */ 81 label = "TA3-GPIO-C"; 89 gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */ 90 label = "TA4-GPIO-D"; 102 * Disable led-5, because GPIO E is 109 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */ [all …]
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| A D | imx6qdl-dhcom-drc02.dtsi | 26 * GPIO line, however the i.MX6 UART driver assumes RX happens 32 gpios = <18 0>; /* GPIO Q */ 74 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts. 77 cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */ 80 rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */ 86 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property 87 * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via 88 * rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1 95 rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
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| A D | imx6qdl-solidsense.dtsi | 100 /* Nordic Chip 1 SWDIO - GPIO 125 */ 102 /* Nordic Chip 1 SWDCLK - GPIO 59 */ 105 /* Nordic Chip 2 SWDIO - GPIO 81 */ 107 /* Nordic Chip 2 SWCLK - GPIO 82 */ 114 /* Red LED 1 - GPIO 58 */ 116 /* Green LED 1 - GPIO 55 */ 118 /* Red LED 2 - GPIO 57 */ 120 /* Green LED 2 - GPIO 56 */
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| A D | imx6dl-prtvt7.dts | 66 label = "GPIO Key ESC"; 72 label = "GPIO Key UP"; 96 label = "GPIO Key F1"; 102 label = "GPIO Key F2"; 108 label = "GPIO Key F3"; 114 label = "GPIO Key F4"; 120 label = "GPIO Key F5"; 126 label = "GPIO Key F6"; 132 label = "GPIO Key F7"; 138 label = "GPIO Key F8"; [all …]
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| A D | imx6ull-dhcom-drc02.dts | 55 * GPIO line, however the i.MX6ULL UART driver assumes RX happens 61 gpios = <25 0>; /* GPIO Q */ 90 rts-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; /* GPIO I */ 91 cts-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; /* GPIO M */ 98 rts-gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* GPIO P */
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| A D | imx6dl-prtmvt.dts | 62 label = "GPIO Key F1"; 68 label = "GPIO Key F2"; 74 label = "GPIO Key F3"; 80 label = "GPIO Key F4"; 86 label = "GPIO Key F5"; 104 label = "GPIO Key UP"; 116 label = "GPIO Key OK"; 122 label = "GPIO Key F6"; 128 label = "GPIO Key F7"; 134 label = "GPIO Key F8"; [all …]
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| /arch/arm64/boot/dts/actions/ |
| A D | s900-bubblegum-96.dts | 68 * GPIO name legend: proper name = the GPIO line is used as GPIO 88 * lines i.e. "[FOO]", the GPIO named lines "GPIO-A" thru "GPIO-L" 94 "GPIO-A", /* GPIO_0, LSEC pin 23 */ 95 "GPIO-B", /* GPIO_1, LSEC pin 24 */ 96 "GPIO-C", /* GPIO_2, LSEC pin 25 */ 97 "GPIO-D", /* GPIO_3, LSEC pin 26 */ 98 "GPIO-E", /* GPIO_4, LSEC pin 27 */ 99 "GPIO-F", /* GPIO_5, LSEC pin 28 */ 100 "GPIO-G", /* GPIO_6, LSEC pin 29 */ 101 "GPIO-H", /* GPIO_7, LSEC pin 30 */ [all …]
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| /arch/arm64/boot/dts/qcom/ |
| A D | qrb5165-rb5.dts | 1180 "GPIO-A", 1181 "GPIO-C", 1182 "GPIO-E", 1183 "GPIO-D", 1190 "GPIO-X", 1201 "GPIO-Z", 1222 "GPIO-F", 1242 "GPIO-G", 1268 "GPIO-K", 1269 "GPIO-I", [all …]
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| A D | apq8016-sbc.dts | 452 * GPIO name legend: proper name = the GPIO line is used as GPIO 471 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only 472 * ones actually used for GPIO. 497 "HDMI_HPD_N", /* GPIO 20 */ 527 "NC", /* GPIO 50 */ 537 "NC", /* GPIO 60 */ 547 "NC", /* GPIO 70 */ 551 "NC", /* GPIO 74 */ 557 "BOOT_CONFIG_0", /* GPIO 80 */ 567 "NC", /* GPIO 90 */ [all …]
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| /arch/arm64/boot/dts/freescale/ |
| A D | imx8mp-dhcom-pdk2.dts | 36 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */ 37 label = "TA1-GPIO-A"; 45 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */ 46 label = "TA2-GPIO-B"; 54 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ 55 label = "TA3-GPIO-C"; 63 gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */ 64 label = "TA4-GPIO-D"; 91 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* GPIO E */ 100 gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */ [all …]
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| A D | imx8mp-dhcom-drc02.dts | 80 * GPIO line, however the i.MX8 UART driver assumes RX happens 86 gpios = <13 0>; /* GPIO Q */ 185 * for RTS/CTS. So configure DHCOM GPIO I as RTS and GPIO M as CTS. 188 cts-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; /* GPIO M */ 191 rts-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */ 198 * uart-has-rtscts from this UART and add the DHCOM GPIO P pin via 206 rts-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; /* GPIO P */ 243 * GPIO I is connected to UART1_RTS 244 * GPIO M is connected to UART1_CTS 245 * GPIO P is connected to RS485_TX_En [all …]
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| A D | imx8mp-dhcom-pdk3.dts | 42 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */ 43 label = "TA1-GPIO-A"; 51 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */ 52 label = "TA2-GPIO-B"; 60 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */ 61 label = "TA3-GPIO-C"; 69 gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; /* GPIO E */ 70 label = "TA4-GPIO-E"; 98 gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>; /* GPIO D */ 118 gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; /* GPIO G */ [all …]
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| /arch/arm64/boot/dts/rockchip/ |
| A D | rk3588-friendlyelec-cm3588-nas.dts | 414 /* GPIO Connector, connected to 40-pin GPIO header */ 561 /* GPIO Connector, connected to 40-pin GPIO header */ 569 /* GPIO Connector, connected to 40-pin GPIO header */ 583 /* GPIO Connector, connected to 40-pin GPIO header */ 590 /* GPIO Connector, connected to 40-pin GPIO header */ 598 /* GPIO Connector, connected to 40-pin GPIO header */ 606 /* GPIO Connector, connected to 40-pin GPIO header */ 614 /* GPIO Connector, connected to 40-pin GPIO header */ 621 /* GPIO Connector, connected to 40-pin GPIO header */ 634 /* GPIO Connector, connected to 40-pin GPIO header */ [all …]
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| /arch/arm/boot/dts/nxp/mxs/ |
| A D | imx28-duckbill-2-spi.dts | 33 MX28_PAD_LCD_D14__GPIO_1_14 /* GPIO 0 */ 34 MX28_PAD_LCD_D15__GPIO_1_15 /* GPIO 1 */ 35 MX28_PAD_LCD_D18__GPIO_1_18 /* GPIO 2 */ 36 MX28_PAD_LCD_D21__GPIO_1_21 /* GPIO 3 */
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| /arch/arm/boot/dts/intel/socfpga/ |
| A D | socfpga_cyclone5_mcvevk.dts | 35 &gpio0 { /* GPIO 0 ... 28 */ 39 &gpio1 { /* GPIO 29 ... 57 */ 43 &gpio2 { /* GPIO 58..66 (HLGPI 0..13 at offset 13) */ 56 irq-gpio = <&portb 28 0x4>; /* GPIO 57, trig. level HI */
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| /arch/arm/boot/dts/st/ |
| A D | ste-hrefv60plus.dtsi | 71 /* Name the GPIO muxed rails on the HREF boards */ 112 /* GPIO 70-77 used for ETM */ 114 /* GPIO 78-81 used for YCBCR */ 215 /* SD card detect GPIO pin, extend default state */ 224 * XENON Flashgun on image processor GPIO (controlled from image 227 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias 319 /* Audio Amplifier HF enable GPIO */ 340 /* MSP : HDTV INTERFACE GPIO line */ 350 * Display Interface 1 uses GPIO 65 for RST (reset). 351 * Display Interface 2 uses GPIO 66 for RST (reset). [all …]
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| A D | stm32mp15xx-dhcom-pdk2.dtsi | 32 * so mark this as polled GPIO key. 35 label = "TA1-GPIO-A"; 42 * so mark this as polled GPIO key. 45 label = "TA2-GPIO-B"; 52 * so mark this as polled GPIO key. 55 label = "TA3-GPIO-C"; 65 label = "TA4-GPIO-D"; 199 interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
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| /arch/powerpc/boot/dts/ |
| A D | wii.dts | 176 GPIO: gpio@d8000c0 { label 206 gpios = <&GPIO 15 0 207 &GPIO 14 0>; 227 * requires refactoring the PIC1, GPIO and OTP nodes 251 gpios = <&GPIO 5 GPIO_ACTIVE_HIGH>; 261 gpios = <&GPIO 0 GPIO_ACTIVE_HIGH>; 267 gpios = <&GPIO 6 GPIO_ACTIVE_HIGH>;
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