Home
last modified time | relevance | path

Searched refs:GPR_K0 (Results 1 – 5 of 5) sorted by relevance

/arch/mips/kvm/
A Dentry.c214 uasm_i_or(&p, GPR_K0, GPR_K0, GPR_V0); in kvm_mips_build_vcpu_run()
329 uasm_i_and(&p, GPR_K0, GPR_K0, GPR_T2); in kvm_mips_build_enter_guest()
331 uasm_i_andi(&p, GPR_K0, GPR_K0, MIPS_ENTRYHI_ASID); in kvm_mips_build_enter_guest()
360 UASM_i_LW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, gprs[GPR_K0]), GPR_K1); in kvm_mips_build_enter_guest()
400 UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu, arch.gprs[GPR_K0]), GPR_K1); in kvm_mips_build_tlb_refill_exception()
448 UASM_i_LW(&p, GPR_K0, offsetof(struct kvm_vcpu, arch.gprs[GPR_K0]), GPR_K1); in kvm_mips_build_tlb_refill_exception()
487 UASM_i_SW(&p, GPR_K0, offsetof(struct kvm_vcpu_arch, gprs[GPR_K0]), GPR_K1); in kvm_mips_build_exception()
598 UASM_i_LW(&p, GPR_K0, uasm_rel_lo((long)&ebase), GPR_K0); in kvm_mips_build_exit()
662 uasm_i_sw(&p, GPR_K0, in kvm_mips_build_exit()
707 uasm_i_lw(&p, GPR_K0, uasm_rel_lo((long)&hwrena), GPR_K0); in kvm_mips_build_exit()
[all …]
/arch/mips/mm/
A Dtlbex.c349 UASM_i_SRL_SAFE(p, GPR_K0, GPR_K0, SMP_CPUID_REGSHIFT); in build_get_work_registers()
355 UASM_i_ADDU(p, GPR_K0, GPR_K0, GPR_K1); in build_get_work_registers()
400 uasm_i_srl(&p, GPR_K0, GPR_K0, 22); /* load delay */ in build_r3000_tlb_refill_handler()
401 uasm_i_sll(&p, GPR_K0, GPR_K0, 2); in build_r3000_tlb_refill_handler()
405 uasm_i_andi(&p, GPR_K0, GPR_K0, 0xffc); /* load delay */ in build_r3000_tlb_refill_handler()
1276 uasm_i_xor(&p, GPR_K0, GPR_K0, GPR_K1); in build_r4000_tlb_refill_handler()
1278 uasm_i_dsrl_safe(&p, GPR_K0, GPR_K0, 12 + 1); in build_r4000_tlb_refill_handler()
1280 uasm_i_or(&p, GPR_K0, GPR_K0, GPR_K1); in build_r4000_tlb_refill_handler()
2070 uasm_i_xor(&p, GPR_K0, GPR_K0, GPR_K1); in build_r4000_tlb_load_handler()
2072 uasm_i_dsrl_safe(&p, GPR_K0, GPR_K0, 12 + 1); in build_r4000_tlb_load_handler()
[all …]
/arch/mips/kernel/
A Dsmp-cps.c107 uasm_i_mfc0(&p, GPR_K0, C0_STATUS); in mips_cps_build_core_entry()
109 uasm_i_and(&p, GPR_K0, GPR_K0, GPR_T9); in mips_cps_build_core_entry()
111 uasm_il_bnez(&p, &r, GPR_K0, label_not_nmi); in mips_cps_build_core_entry()
113 UASM_i_LA(&p, GPR_K0, (long)&nmi_handler); in mips_cps_build_core_entry()
118 uasm_i_lui(&p, GPR_K0, val >> 16); in mips_cps_build_core_entry()
119 uasm_i_ori(&p, GPR_K0, GPR_K0, val & 0xffff); in mips_cps_build_core_entry()
120 uasm_i_mtc0(&p, GPR_K0, C0_CAUSE); in mips_cps_build_core_entry()
122 uasm_i_lui(&p, GPR_K0, val >> 16); in mips_cps_build_core_entry()
123 uasm_i_ori(&p, GPR_K0, GPR_K0, val & 0xffff); in mips_cps_build_core_entry()
124 uasm_i_mtc0(&p, GPR_K0, C0_STATUS); in mips_cps_build_core_entry()
A Dtraps.c2050 UASM_i_LA(&buf, GPR_K0, handler); in set_except_vector()
2051 uasm_i_jr(&buf, GPR_K0); in set_except_vector()
/arch/mips/include/asm/
A Dregdef.h53 #define GPR_K0 26 /* kernel scratch */ macro
96 #define GPR_K0 26 /* kernel temporary */ macro

Completed in 25 milliseconds