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Searched refs:GPR_T2 (Results 1 – 4 of 4) sorted by relevance

/arch/mips/mm/
A Dpage.c471 build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
479 build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
493 build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
501 build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
517 build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
524 build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
535 build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
542 build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
559 build_copy_load(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
563 build_copy_store(&buf, GPR_T2, off + 2 * copy_word_size); in build_copy_page()
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/arch/mips/kernel/
A Dpm-cps.c274 uasm_i_mfc0(pp, GPR_T2, 25, (perf_counter * 2) + 0); /* PerfCtlN */ in cps_gen_flush_fsb()
317 uasm_i_mtc0(pp, GPR_T2, 25, (perf_counter * 2) + 0); /* PerfCtlN */ in cps_gen_flush_fsb()
399 uasm_i_addiu(&p, GPR_T2, GPR_T1, 1); in cps_gen_entry_code()
400 uasm_i_sc(&p, GPR_T2, 0, r_nc_count); in cps_gen_entry_code()
401 uasm_il_beqz(&p, &r, GPR_T2, lbl_incready); in cps_gen_entry_code()
579 uasm_i_addiu(&p, GPR_T2, GPR_T1, -1); in cps_gen_entry_code()
580 uasm_i_sc(&p, GPR_T2, 0, r_nc_count); in cps_gen_entry_code()
581 uasm_il_beqz(&p, &r, GPR_T2, lbl_decready); in cps_gen_entry_code()
/arch/mips/kvm/
A Dentry.c313 uasm_i_lw(&p, GPR_T2, offsetof(struct thread_info, cpu), GPR_GP); in kvm_mips_build_enter_guest()
315 uasm_i_sll(&p, GPR_T2, GPR_T2, ilog2(sizeof(long))); in kvm_mips_build_enter_guest()
316 UASM_i_ADDU(&p, GPR_T3, GPR_T1, GPR_T2); in kvm_mips_build_enter_guest()
324 uasm_i_mul(&p, GPR_T2, GPR_T2, GPR_T3); in kvm_mips_build_enter_guest()
327 UASM_i_ADDU(&p, GPR_AT, GPR_AT, GPR_T2); in kvm_mips_build_enter_guest()
328 UASM_i_LW(&p, GPR_T2, uasm_rel_lo((long)&cpu_data[0].asid_mask), GPR_AT); in kvm_mips_build_enter_guest()
329 uasm_i_and(&p, GPR_K0, GPR_K0, GPR_T2); in kvm_mips_build_enter_guest()
/arch/mips/include/asm/
A Dregdef.h32 #define GPR_T2 10 macro
83 #define GPR_T2 14 macro

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