| /arch/powerpc/crypto/ |
| A D | ghashp10-ppc.pl | 80 le?vperm $H,$H,$H,5 93 vsl $H,$H,$t0 # H<<=1 96 vxor $H,$H,$t1 # twisted H 98 vsldoi $H,$H,$H,8 # twist even more ... 105 stvx_u $H, r9,r3 135 vsl $H,$H,$t0 # H<<=1 148 stvx_u $H, r9,r3 216 vsldoi $H,$Xl,$Xl,8 225 stvx_u $H,r9,r3 251 lvx_u $H, r9,$Htbl [all …]
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| A D | ghashp8-ppc.pl | 72 lvx_u $H,0,r4 # load H 78 le?vperm $H,$H,$H,5 90 vspltb $t1,$H,0 # most significant byte 91 vsl $H,$H,$t0 # H<<=1 94 vxor $H,$H,$t1 # twisted H 96 vsldoi $H,$H,$H,8 # twist even more ... 98 vsldoi $Hl,$zero,$H,8 # ... and split 99 vsldoi $Hh,$H,$zero,8 103 stvx_u $H, r9,r3 124 lvx_u $H, r9,$Htbl [all …]
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| A D | aes-gcm-p10.S | 14 # X1 * H^4 + X2 * H^3 + x3 * H^2 + X4 * H = 18 # (X4.h * H.h + X4.l * H.l + X4 * H) 21 # H Poly = v2 23 # ( H.l, H, H.h) 24 # ( H^2.l, H^2, H^2.h) 25 # ( H^3.l, H^3, H^3.h) 26 # ( H^4.l, H^4, H^4.h) 174 # H Poly = v2 185 vpmsumd 27, 13, \S1 # H4.L * X.H + H4.H * X.L 186 vpmsumd 28, 10, \S2 # H3.L * X1.H + H3.H * X1.L [all …]
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| A D | aes-gcm-p10-glue.c | 61 u8 H[16]; /* subkey */ member 125 aes_p10_encrypt(hash->H, hash->H, rdkey); in gcmp10_init() 126 set_subkey(hash->H); in gcmp10_init() 127 gcm_init_htable(hash->Htable+32, hash->H); in gcmp10_init()
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| /arch/arm/boot/dts/st/ |
| A D | stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts | 94 <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */ 95 <STM32_PINMUX('H', 11, AF14)>, /* LTDC_R5 */ 104 <STM32_PINMUX('H', 2, AF14)>, /* LTDC_R0 */ 105 <STM32_PINMUX('H', 3, AF14)>, /* LTDC_R1 */ 106 <STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */ 107 <STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */ 108 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */ 109 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */ 110 <STM32_PINMUX('H', 14, AF14)>, /* LTDC_G3 */ 111 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
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| A D | stm32mp15-pinctrl.dtsi | 115 <STM32_PINMUX('H', 9, AF13)>,/* DCMI_D0 */ 116 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 117 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */ 118 <STM32_PINMUX('H', 12, AF13)>,/* DCMI_D3 */ 119 <STM32_PINMUX('H', 14, AF13)>,/* DCMI_D4 */ 124 <STM32_PINMUX('H', 7, AF13)>,/* DCMI_D9 */ 126 <STM32_PINMUX('H', 15, AF13)>;/* DCMI_D11 */ 159 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ 160 <STM32_PINMUX('H', 11, AF13)>,/* DCMI_D2 */ 194 <STM32_PINMUX('H', 10, AF13)>,/* DCMI_D1 */ [all …]
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| A D | stm32mp13-pinctrl.dtsi | 256 pinmux = <STM32_PINMUX('H', 2, GPIO)>; 293 <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */ 304 <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */ 333 <STM32_PINMUX('H', 9, AF11)>, /* LCD_DE */ 340 <STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */ 348 <STM32_PINMUX('H', 14, AF11)>, /* LCD_B4 */ 364 <STM32_PINMUX('H', 9, ANALOG)>, /* LCD_DE */ 371 <STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */ 379 <STM32_PINMUX('H', 14, ANALOG)>, /* LCD_B4 */ 777 <STM32_PINMUX('H', 10, AF6)>; /* SPI2_MOSI */ [all …]
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| A D | stm32f7-pinctrl.dtsi | 176 pinmux = <STM32_PINMUX('H', 8, AF4)>, /* I2C3_SDA */ 177 <STM32_PINMUX('H', 7, AF4)>; /* I2C3_SCL */ 186 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */ 206 pinmux = <STM32_PINMUX('H', 4, AF10)>, /* OTG_HS_ULPI_NXT */ 352 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ 355 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
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| /arch/x86/crypto/ |
| A D | twofish-x86_64-asm_64.S | 72 movzx b ## H, %edi;\ 75 movzx a ## H, %edi;\ 82 movzx b ## H, %edi;\ 85 movzx a ## H, %edi;\ 110 movzx b ## H, %edi;\ 113 movzx a ## H, %edi;\ 121 movzx b ## H, %edi;\ 123 movzx a ## H, %edi;\ 145 movzx a ## H, %edi;\ 148 movzx b ## H, %edi;\ [all …]
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| A D | twofish-i586-asm_32.S | 73 movzx b ## H, %edi;\ 76 movzx a ## H, %edi;\ 83 movzx b ## H, %edi;\ 86 movzx a ## H, %edi;\ 111 movzx b ## H, %edi;\ 114 movzx a ## H, %edi;\ 121 movzx b ## H, %edi;\ 124 movzx a ## H, %edi;\ 148 movzx a ## H, %edi;\ 151 movzx b ## H, %edi;\ [all …]
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| /arch/mips/n64/ |
| A D | init.c | 52 #define H 240 macro 83 .height = H, in n64_platform_init() 122 orig = kzalloc(W * H * 2 + 63, GFP_DMA | GFP_KERNEL); in n64_platform_init() 141 res[0].end = phys + W * H * 2 - 1; in n64_platform_init() 150 #undef H
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| /arch/hexagon/kernel/ |
| A D | head.S | 29 r24.H = #HI(swapper_pg_dir) 95 R1.H = #HI(PAGE_OFFSET >> (22 - 2)) 186 {r29.H = #HI(init_thread_union); r0.H = #HI(_THREAD_SIZE); } 195 { r0.H = #HI(__bss_start); r2.h = #HI(__bss_stop); }
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| A D | vm_entry.S | 61 R2.H = #HI(_THREAD_SIZE); } \ 220 R1.H = #HI(CHandler); \ 286 R26.H = #HI(do_work_pending); 365 R26.H = #HI(do_work_pending);
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| /arch/x86/boot/ |
| A D | video.c | 197 #define H(x) ((x)-'a'+10) macro 198 #define SCAN ((H('s')<<12)+(H('c')<<8)+(H('a')<<4)+H('n'))
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| /arch/arm64/boot/dts/renesas/ |
| A D | ulcb-kf-audio-graph-card-mix+split.dtsi | 19 * (H) CPU7 (2ch) <--/ (TDM-b: 2,3ch) 31 * (H) arecord -D plughw:1,5 xxx.wav (TDM-b) 52 &snd_kf6 /* (H) CPU7 */ 116 /* (H) CPU7 <- PCM3168A-c */ 199 * (H) CPU7
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| A D | ulcb-kf-audio-graph-card2-mix+split.dtsi | 19 * (H) CPU7 (2ch) <--/ (TDM-b: 2,3ch) 31 * (H) arecord -D plughw:1,5 xxx.wav (TDM-b) 52 &fe_h /* (H) CPU7 */ 76 * (H) CPU7 206 * (H) CPU7
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| A D | ulcb-kf-simple-audio-card-mix+split.dtsi | 19 * (H) CPU7 (2ch) <--/ (TDM-b: 2,3ch) 31 * (H) arecord -D plughw:1,5 xxx.wav (TDM-b) 113 * (H) CPU7 188 * (H) CPU7
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| A D | rzg3e-smarc-som.dtsi | 277 pinmux = <RZG3E_PORT_PINMUX(H, 0, 1)>, /* SD2CLK */ 278 <RZG3E_PORT_PINMUX(H, 1, 1)>; /* SD2CMD */ 282 pinmux = <RZG3E_PORT_PINMUX(H, 2, 1)>, /* SD2DAT0 */ 283 <RZG3E_PORT_PINMUX(H, 3, 1)>, /* SD2DAT1 */ 284 <RZG3E_PORT_PINMUX(H, 4, 1)>, /* SD2DAT2 */ 285 <RZG3E_PORT_PINMUX(H, 5, 1)>; /* SD2DAT3 */
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| /arch/arm/boot/dts/aspeed/ |
| A D | aspeed-bmc-portwell-neptune.dts | 28 gpios = <&gpio ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 33 gpios = <&gpio ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 38 gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
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| A D | aspeed-bmc-opp-palmetto.dts | 70 trans-gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>; 326 gpios = <ASPEED_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 333 gpios = <ASPEED_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 340 gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 347 gpios = <ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
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| A D | aspeed-bmc-opp-lanyang.dts | 56 gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_HIGH>; 61 gpios = <&gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_HIGH>; 74 mux-gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 283 gpios = <ASPEED_GPIO(H, 5) GPIO_ACTIVE_HIGH>;
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| A D | aspeed-bmc-facebook-bletchley.dts | 196 gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>; 197 linux,code = <ASPEED_GPIO(H, 2)>; 201 gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>; 202 linux,code = <ASPEED_GPIO(H, 3)>; 206 gpios = <&gpio0 ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>; 207 linux,code = <ASPEED_GPIO(H, 4)>; 211 gpios = <&gpio0 ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>; 212 linux,code = <ASPEED_GPIO(H, 5)>; 216 gpios = <&gpio0 ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; 217 linux,code = <ASPEED_GPIO(H, 6)>; [all …]
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| A D | aspeed-bmc-asrock-e3c246d4i.dts | 31 gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; 149 /* H */ "FM_ME_RCVR_N", "O_PWROK", "SKL_CNL_R", "D4_DIMM_EVENT_3V_N",
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| /arch/arm/boot/dts/nxp/imx/ |
| A D | imx6ull-dhcom-som-cfg-sdcard.dtsi | 11 * GPIO H and GPIO I will be available 18 * pwrseq node is also deleted in order to ensure that GPIO H is released.
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| /arch/arm64/boot/dts/nvidia/ |
| A D | tegra210-p2180.dtsi | 46 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 47 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; 49 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; 362 power-gpios = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>; 372 interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>;
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