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Searched refs:ICH_LR_PHYS_ID_MASK (Results 1 – 3 of 3) sorted by relevance

/arch/arm64/kvm/vgic/
A Dvgic-v3-nested.c225 irq = vgic_get_vcpu_irq(vcpu, FIELD_GET(ICH_LR_PHYS_ID_MASK, lr)); in translate_lr_pintid()
232 lr &= ~ICH_LR_PHYS_ID_MASK; in translate_lr_pintid()
233 lr |= FIELD_PREP(ICH_LR_PHYS_ID_MASK, (u64)irq->hwintid); in translate_lr_pintid()
285 irq = vgic_get_vcpu_irq(vcpu, FIELD_GET(ICH_LR_PHYS_ID_MASK, lr)); in vgic_v3_sync_nested()
/arch/arm64/kvm/hyp/
A Dvgic-v3-sr.c784 pid = (lr_val & ICH_LR_PHYS_ID_MASK) >> ICH_LR_PHYS_ID_SHIFT; in __vgic_v3_clear_active_lr()
/arch/arm64/include/asm/
A Dsysreg.h998 #define ICH_LR_PHYS_ID_MASK (0x3ffULL << ICH_LR_PHYS_ID_SHIFT) macro

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