Searched refs:INTEL_ARCH_EVENT_MASK (Results 1 – 4 of 4) sorted by relevance
| /arch/x86/events/ |
| A D | perf_event.h | 100 ((config & INTEL_ARCH_EVENT_MASK) >= INTEL_TD_METRIC_RETIRING) && in is_metric_event()
101 ((config & INTEL_ARCH_EVENT_MASK) <= INTEL_TD_METRIC_MAX); in is_metric_event()
466 INTEL_ARCH_EVENT_MASK)
472 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
483 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
547 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
552 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
559 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
564 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
571 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
[all …]
|
| /arch/x86/include/asm/ |
| A D | perf_event.h | 64 #define INTEL_ARCH_EVENT_MASK \ macro
|
| /arch/x86/events/intel/ |
| A D | core.c | 3427 event->hw.config &= ~INTEL_ARCH_EVENT_MASK; in intel_fixup_er()
3431 event->hw.config &= ~INTEL_ARCH_EVENT_MASK; in intel_fixup_er()
4087 return (event->attr.config & INTEL_ARCH_EVENT_MASK) == X86_CONFIG(.event=0xcd, .umask=0x01); in is_mem_loads_event()
4092 return (event->attr.config & INTEL_ARCH_EVENT_MASK) == X86_CONFIG(.event=0x03, .umask=0x82); in is_mem_loads_aux_event()
4243 if ((event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_FIXED_VLBR_EVENT) in intel_pmu_hw_config()
4270 (event->attr.config & ~INTEL_ARCH_EVENT_MASK)) in intel_pmu_hw_config()
4985 return (event->hw.config & INTEL_ARCH_EVENT_MASK) == in erratum_hsw11()
|
| A D | ds.c | 1412 ((attr->config & INTEL_ARCH_EVENT_MASK) == in pebs_update_adaptive_cfg()
|
Completed in 37 milliseconds